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Okay let's pretend I'm doing that. But let's also pretend I want the most durable PCB pads that money can buy for my PCB that's safely inside a sealed box. What processes are more durable than others?
(In reality, the "exposed" PCB will only be occasionally exposed. 99% of the time it will...
Just curious if anyone has any recommendations for PCB processes or finish types for the most durable pads.
The application is a docking-type cradle where one side of the PCB will be exposed to air, fingers, etc with only pads and mask (no components or solder).
I think the standard soldermask...
LTC's DC674B Eval Board uses PFET FDC658AP and NFET Si3434DV and has max output of 2A and 10-cell battery.
My goal was 5A charging so I can achieve that now, but only with active cooling. I still think this should be possible to do without active cooling and below 60C but I would probably need...
Update - I've gone back to my previous board design with D-PAK (TO-252) FETs and have installed STD52P3LLH6 and STD65N3LLH5
P-FET:
Qg= 33nC @ 4.5V
Rds-on = 17mR max
N-FET:
Qg = 3.6nC @ 4.5V
Rds-on = 9.3mR max
With a small adhesive heatsink and cooling fan running directly over it, they stay...
Thanks treez, I wanted to keep the gate traces as short and away from other components as possible so adding 0-ohm resistors and pulldowns/pullups makes layout harder. I really like the idea of adding a parallel diode and removing the gate resistor to check for shoot-through. I will do that on...
EP,
That is a good point. I just checked the 5V sq wave at the same horizontal resolution and I get 400ns+ fall times so I am probably reaching the limitations of this scope.
I guess it would be helpful to have an eval board to compare waveforms to.
I was able to talk to an applications...
Just replaced with a new IC, same behavior.
I just tried turning on the circuit while cool and touching the choke and FETs. The FETs are getting hot first, the choke stays cool until the FETs spread heat to the choke. It is definitely the P-FET heating the fastest. It gets hot in about 10...
I have ordered a few different FETs with more similar characteristics to the demo board (capable of 2A)
I have these installed right now:
P-CH: DMP3056LSS-13
"30V, 7.1A"
65mOhms @ Vgs = 4.5V
6.8nC @ Vgs = 4.5V
N-CH: STS10N3LH5
"30V, 10A"
28mOhm @ Vgs = 4.5V
1.7nC @ Vgs = 4.5V
The rise and...
Thanks, it is all making much more sense now, the power dissipation in the MOSFETs needs to be a trade-off between rds-on losses and switching losses. This converter is higher frequency than my other synchronous converter (LTC4020 at f=200kHz) so gate charge must be a lot smaller.
The first...
Thanks EP
I think primarily it is only the P-FET getting too hot (hard to tell, but the P-FET gets hot first) so I ordered some different P-FETs to try with lower Qg.
SI7143DP-T1-GE3
30V, 35A
rds-on = 10mR
Qg-max = 37nC
Rja = 30 C/W
Also SQJ443EP
40V, 40A
rds-on = 29mR
Qg-max = 57nC
Rja = 65...
Thanks for the responses, all.
Unfortunately there is no LTC4011 model for LTspice or demo sim.
I've tried to make a few oscilloscope measurements but the circuit can only be powered for 10-15 seconds before it overheats, which makes actual measurements difficult. I did manage to get a good...
I added 22R gate resistors to the first version with FDD6637 and SUD50N04-8M8P-4GE3 FETs and the P-FET immediately smoked out and blew a pin off. I decided not to add pads for them because the LTC4011 datasheet doesn't mention them, as well as the DC674B eval board (2A charge current) doesn't...
Is there a good equation or application note for calculating switching losses you could recommend? The LTC4011 datasheet only gives an equation for the power dissipated by the LTC4011 from driving the gates, but nothing for the FETs themselves.
Thanks
I've built an LTC4011 circuit, schematic here:
Everything works but the FETs get scorching hot in seconds.
I had previously built another with FDD6637 and SUD50N04-8M8P-4GE3 FETs which also got hot but not as bad, these were supposed to make less heat, not more
So these new FETs should...
When Switch B turns on and SW1 node (ch2) goes low, it seems Switch C also turns on and SW2 node (ch1) goes low, pulling down both sides of the choke at the same time, this is normal?
At the same time, it looks like current flows from GND into SW1 (peak is -86mV/5mR = -17.2 A) then current...
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