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Hi,
Does anybody know how to set Laker autosave cellview by execute steps intead of by time?
For example, I want to save the layout every three drawing steps. How to realize that?
Thanks in advance.
1. crtmom means rotative metal capacitor. It has the fingers layout structure.
3. 2.5V under-drive 1.8V is a kind of device, the vcc can be 1.8V by changing gate length, no need any extra mask. So is 2.5V over-drive 3.3V. They are available in the N65 process with IO is 2.5V.
4. C is CMOS, R is...
Seeing the layout of SRAM periphical circuit, there are several big polys(no implant and other layers) with contact to metal1, and the poly is floating. It doesn't look like dummy because some place where is more empty doesn't have the poly.
Does anyboly tell me what's the use of there...
When there are floating ports in schemetic, while layout misses them. How to let the lvs result report the name of missed floating ports?
I tried a simple example. There are 6 ports including one floating output 'B' in schemetic, and 5 ports except 'B' in layout. The lvs result is correct...
Acturally, I didn't set variable $CDS_INST_DIR. I wrote the full path, and error message shows the full path.
And I imported the cdl to schematic successfully by Laker. It looks fine.
anyway thank you, Erikl!
I have the 'r-x' access rights for the sample library. I think that's enough, isn't it?
It seems that the translating was blocked........
Waiting for help!!!
Sure it matters: You need the directory $CDS_INST_DIR/tools/dfII/samples/cdslib/sample/
$CDS_INST_DIR is the root directory of your C(at)dence installation.
I change the directory to where Cadence installed. It clear the last error. But there is another issue as below.
....ni.log...
Hi,
I have the netlist, how do I translate it to schematic? I tried 'import-CDL', the schematic library was set by 'samples/cdslib/sample'. It reports error: Failed to opent cellview (nfet symbol) from lib (/samples/cdslib/sample) in 'r' mode because cellview does not exist.
Could anybody help...
Yes, it does get lvs clean. The missing information is shown as warnings in 'information and warnings'. My purpose is to find out the missing ports and add them in layout. I don't know how to set up calibre to let it report the name of missing ports.
Anyway thank you.
As for lvs check, when there are floating ports in schemetic, and layout miss thoes ports, Dracula will report all the missing ports name. While Calibre only reports how many ports unmatched.
Could anyone tell me how to make Calibre list all the name of the floating ports missing in layout?
Thanks.
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