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Hi guys,
I'm doing physical design using IC Compiler. i want the clock signal to enter a plan group on a certain spot. How can i specify that? Do i have to specify pins or ports to that plan groups. I can't really find a command for that :(
Would be great if someone could help me out.
Greets
Hey guys,
i just tried to read in a .ddc file that is the netlist of my synthesize top-level module which includes various other modules, named system.ddc. Both logical and physical libraries are set up properly, but as soon as i invoke "check_design", ic compiler throws the following error...
Hey guys,
i just tried to read in a .ddc file that is the netlist of my synthesize top-level module which includes various other modules, named system.ddc. Both logical and physical libraries are set up properly, but as soon as i invoke "check_design", ic compiler throws the following error...
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