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Recent content by balasub

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    5 years exp Fpga design - looking for work from home

    i had clearly mentioned in my previous post that i am into VLSI front end verification.
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    5 years exp Fpga design - looking for work from home

    hi, as far as i know they have no openings for VLSI engineers. Only physical design and backend work.
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    looking for some work from home - Dubai

    hi, i currently reside in dubai. There are no companies here for VLSI domain of work. Can someone help me find something to do like working from home... i am not really expecting any salary but just some work.. i am into VLSI front-end verification as well as pervasive verification ...
  4. B

    5 years exp Fpga design - looking for work from home

    hi, i currently reside in dubai. There are no companies here for VLSI domain of work. Can someone help me find something to do like working from home... i am not really expecting any salary but just some work.. i am into VLSI front-end verification as well as pervasive verification ... Thanks!
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    pre and post-layout simulation

    pre layout simulation How is pre layout simulation and post layout simulations different? Also how are they different from functional verification?
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    writing testbenches by Janick beregon

    Re: Writing Testbenches pdf i want to dowload this book... the links given don't exist anymore can someone help!
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    what needs to be verified

    Say i have a multi - DSP + multi -FFT processor block . What needs to be verified at this block level? I am a newbie in the world of DSP and verification.
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    why is there a need for FFT + DSP in specific applications?

    Re: FFT + DSP ok...thanks mowgli! say if we have a DSP and a ARM and a FEC (which is the trend these days in all communication systems),what is the role of each? I am just trying to understand the current technology .... if u have any good papers on this subject please pass it on to me...
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    why is there a need for FFT + DSP in specific applications?

    Re: FFT + DSP ok...thanks for the reply by the way if we have a block with a fft processor and a dsp what are the various factors to be considered while verifying the block using simulation.
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    why is there a need for FFT + DSP in specific applications?

    FFT + DSP why is there a need for a FFT processor along with a DSP processor in specific applications?
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    Differnce between Hvt and Lvt cells

    hvt cells refer to this for some basic simple explanation
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    resource utilization factor from a top-level design

    resource utilization how to find the block level resource utilization factor from a top-level synthesized design? This is top-bottom ...not bottom-to -top. I use isplever.Find that .mrp file gives the resource utilization for entire design... but where can i find info for the lower level modules?
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    PCI config space - how is the burst size calculated?

    burst size how is the burst size calculated depending on the minimum gnt settings in PCI config space?
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    what does the CPRI and the SRIO mean?

    CPRI and SRIO?? what are these
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    any tutorials for system verilog

    Hi, I am looking for system verilog tutorials.
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