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Recent content by Bajaj

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    How to calculate total number GND and PWR pin?

    Hi All, I have couple of questions. 1> How to calculate total number of GND and PWR pins required for ASIC? It is percentage of total number of signal pins? 2> How to distribute GND and PWR pins for BGA packege? TIA :D
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    How to Select different Multiplier in Ambit Buildgates

    I have lots of signed multiplication in my design. Multiplier given by buildgates are not fast enough. can i select different multiplier in buildgates?? or i have to write my own multiplier?? Thanks Bajaj
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    Altera configuration Problem?? Help

    Hello :) I have board with Altera stratix FPGA. Because of board design mistake, MSEL[2:0] are always logic 1. I can not cut or modify because tarce are not visible (burried). Can i use this board? if yes what configurtaion i should use. can i use JTAG configuration? Thanks
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    Newbie Question (Board Design with 3 altera startix devices)

    Re: Newbie Question (Board Design with 3 altera startix devi Thanks for reply How you add a link? you mean jumper at output??
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    Newbie Question (Board Design with 3 altera startix devices)

    Hello, I am Totally Newbie at board design and I am designing board with 3 altera parts (EP1s80F1508). I have following questions 1. one 3.3v@3A volatge reg. is enough for all three Parts? (VCCIO) 2. I am using three 1.5v@3A voltage reg. (one for each part). I really need three? or...
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    Req: Reference schematic with stratix device

    yes :) but i am total newbie why??
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    Req: Reference schematic with stratix device

    Hello, I am looking for reference schematic with stratix device. Thanks In Advance :)
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    VHDL and Verilog which one you use more often?

    most of engineer learn c in school. so verilog leaning is very easy
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    Redhat 9.0, Fedora and Enterprise Redhat

    I tried fedora for different EDA tools but it has lot of problems. Redaht 9.0 is better then fedora
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    SystemC , Systemverilog , vera , specman...

    combination of system c and system verilog
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    Modelsim license issue...

    The solution is to install a protocol that requires the ethernet driver to remain enabled. This does not impact the performance of the machine or the network. Follow the instructions below for your operating system. Windows 98 1. Start -> Settings -> Control Panel 2. Double click on Network...
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    Differnce between Design Vision & Design Analyzer ??

    design analyzer is design vision Hello :) what is Differnce between Design Vision & Design Analyzer ?? Can anybody explain or link to explanation?? Thanks :D
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    DesignAnalyzer Problem (RH 7.2)

    Hello :) When i try to read *.pla file in design analyzer i am getting following message "pla format is not enabled. (UID-179)" That means i am missing some feature in license file?? if yes anybody can give me feature name?? I am using Redhat 7.2 Thanks In Advance :D:D
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    Design Analyzer Error (RH 7.3, DA 2003.06)

    Hello fiber7 Is 2003.06 works with RH 9.0??
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    Design Analyzer Error (RH 7.3, DA 2003.06)

    When I try to read verilog or vhdl files i am getting following error ----------------------------------- Initializing... Error id=489925 Fatal: Internal system error, cannot recover. --------------------------------------- I am using redhat linux 7.3, design analyzer version 2003.06 What is...
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