Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by aznsj

  1. A

    ASIC VERIFICATION INTERVIEW

    hi, I will be having a phone interview with intel for the poistion asic verification engineer. i am a fresh grad. Could you pls give me some ideas about what kind of question they will be asking me? Thanks
  2. A

    any idea abt job fr VLSI designer

    hey ravjot, I have the same situation, still on the job market now
  3. A

    can someone help me to fix the simple problem? (Perl)

    hi, I fix the problem. use warnings; @fred =(1..10); print "\@fred is @fred\n"; print "(should be 6 7 8 9 10) \n"; #my @barney= &above_average(100, 1..10); #print "\@barney is @barney\n"; #print "(should be just 100)\n"; $sum=&total(@fred); $ave=&ave(@fred); @list=&ab_ave(@fred); sub total...
  4. A

    can someone help me to fix the simple problem? (Perl)

    The purpose of below Perl script is to list the elements which are above the average. Unfortunately, I cannot debug it myself, can you help me ? ////////////////////////// use warnings; @fred =(1..10); $sum=&total(@fred); $ave=&ave(@fred); @list=&ab_ave(@fred); print "\@fred is @fred\n"; print...
  5. A

    AMBA -AHB, HREADYIN at slave ???

    hready to slave I am working on the AHB2.0, does anyone know if the ready input and output on the slave side is separated or not? or just behave as in/out put for one
  6. A

    Opencores Etehrnet core with OPB Interface

    hey, guy, we are doing the same thing, you can connect me. I am doing wrapper transfer AHB to Packets
  7. A

    Need help VHDL - how to build wrapper convert bus signal

    Need help VHDL coding Can anyone tell me how to build a wrapper convert bus signal to packets? Any reference can I take ? Thanks
  8. A

    Layout: Any risk put two w<<L transistor close?

    I think it depends on which DRC rule you are used.
  9. A

    Gate-level Netlist TO RTL Netlist

    gtech ddc As far as I know , you can use NClaunch..

Part and Inventory Search

Back
Top