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Recent content by Ashik Ghona

  1. A

    what is the significance of Seed value for RTL simulation ?

    what is the significance of Seed value for RTL simulation ? I have run testcase with one seed value and it's passing. Then I ran the same testcase with othe seed value and it's failing..!!..What it means ?..IS it bug in dut ? How can we be sure that we have covers all possible values of seeds...
  2. A

    What is FIFO recenter ? what kind of bugs are possible during FIFO recenter ?

    What is FIFO recenter ? what kind of testcases should be given to find recenter related bugs in FIFO DUT ?
  3. A

    What is FIFO recenter ? what kind of testcases should be given ?

    What is FIFO recenter ? what kind of testcases should be given to find recenter related bugs in FIFO DUT ?
  4. A

    FIFO depth for async FIFO

    Probabltl this will help you.. https://chipverification.blogspot.in/2008/04/depth-of-asynchronous-fifo.html#uds-search-results - - - Updated - - - Probabltl this will help you.. http://chipverification.blogspot.in/2008/04/depth-of-asynchronous-fifo.html#uds-search-results
  5. A

    what is the utility of FIFO_almost_full,FIFO_almost_empty Signal ?

    what is the utility of FIFO_almost_full,FIFO_almost_empty Signal ?,FIFO_low_thresold,FIFO_high_thresold, what is FIFO_recenter flag ? why it needed ? why we need to recenter FIFO ? How to find testcases if my FIFO has above pins ?
  6. A

    significance of the AC,DC and Absolute maxim parameters in D flop flop datasheet

    what is the significance of the AC,DC and Absolute maxim parameters in D flop flop datasheet ?? why we required these ?:smile:
  7. A

    Verilog FAQ

    thank you bigdogguru for link
  8. A

    Why IN K-map has transition states like 00,01,11,10 ??.why not like 00,01,10,11 ?

    That is fine.but what is the advantage.It's ok that it's gray code sequence but the question is why we are following that sequence to reduce expression ?
  9. A

    Why IN K-map has transition states like 00,01,11,10 ??.why not like 00,01,10,11 ?

    Why IN K-map has transition states like 00,01,11,10 ??.why not like 00,01,10,11 ?
  10. A

    Is possible to design 4 input XOR ?

    Is possible to design 4 input XOR ?
  11. A

    Very Good tutorilals

    thanks man...thannara123....You have done excellent job by posting links here...thanks a lot...
  12. A

    Embebed systems full course in India

    Sandeepani-Specialized VLSI/Embedded Training School I am learning VLSI here....They have very good staff faculties and facilities and industrial expert contacts....It's very good for Embedded too...
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