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Yes I think you need to do the product of the samples and then sum and divide them as you mention. Basically integrate the VI. Same thing for secondary.
I shouldn't have said DC. I meant ohmic losses i.e. I^2 R losses in the transformer wire. You already have the currents in primary and...
Thanks for explaining it better. I requested to remeasure because it seemed the losses in the transformer may be excessive. But yes to quantify it I would just subtract the power delivered to the output from the intput power. That would give the total loss. To go a step further we could quantify...
I did't understand your statement about measuring with 2 100:1 dividers. The transformer will step the voltage down and then depending on the load on the secondary the current should be set. If the primary current is almost the same as the secondary with the voltage being stepped down...
Although I think this case should not happen but depends on your control loop. If you want to do that Qg should be considered only once to turn the high side FET on.
I agree with your analysis that you may need a little extra to turn it ON and keep it ON. But I think Dmax may not be needed. That would be too conservative. Dmin may be better since if you are off for a long time the converter may not go into Dmax unless there is something wrong with the loop...
The noise file name parameter description from the Cadence manual says it needs a file name with frequency noise pairs data. I don't think the value you enter in there would be doing anything. Did you try simulating without entering anything in there and then see. Maybe the result you get is due...
Vds seen by the FET is vin+vout+diode drop. So you choose the fet which can take that taking the worst case for all and make sure to include any Vin surge conditions. After that add some margin.
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One way to do that with Linkswitch would be to use an opamp to provide the feedback voltage. If you don't want it adjustable you can remove the opamp altogether and just select Rsns appropriately and connect D2 from the top of Rsns directly to the FB node. With the opamp I haven't tested it but...
In the transient simulation options there is a parameter called outputstart. The time you give to this parameter is the time from when the output would be saved.
Its difficult to suggest solutions without looking at the circuit but anytime you have a feedback you have to make sure the loop is adequately compensated to be stable. Once you add Common Mode Feedback you need to make sure that it is stable and you may need to add compensation to it.
Re: How to design DC-DC to let output voltage follow input voltage?
Using a difference amplifier you can create either a rising slope or falling slope as shown in the image. All you need to do is detect in which region does vi lie and then connect the right signals for v1 and v2 of the...
Yes going to the high side it may go up to 1.7V if the amplifier output can go that high. That is only a 0.9V swing. On the low side there is more room and if the amplifier output can go down to -0.5V then you can get the full swing on the low side for +/-50mv input
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