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Recent content by aruipksni

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    Servo component blocking my output pin.. how does it interfere with my other componen

    because before part of the process act like combinatoric process. after you fix the sensitivity list it is change after clock event, and now you have a shift. basically you need to separate synchronous and combinatoric processes.
  2. A

    Servo component blocking my output pin.. how does it interfere with my other componen

    hi kidi3 : see my remark about using sensitivity list in synchronous process. in general it is best only to include the clock in synchronous process, if you are using asynchronous reset it is ok to add it, but dont add other inputs.
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    Compile Altera Library Files in Questa Through Transcript Question

    i think u are spposed to compile this to stratixv lib and not to work lib.
  4. A

    [SOLVED] Xilinx simulation failed

    hi sandik93 . basically it is about cleaning files. i deleted/renamed some uc.jhd, uc.sch, deleted the main.wf file ofcourse and did clean up project,.
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    Servo component blocking my output pin.. how does it interfere with my other componen

    hi kidi3. ---------- it is nice of you to share your code. now i think that if you share your project you should akso tell everybody : 1 where are the relevant files (for example : my source files for pjt A are in /my/pjt/a/src/files) 2 then what their names means (for example : my xxx.vhd...
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    [SOLVED] Xilinx simulation failed

    hi sandkid93 it look like the underline file doesn't seem to have the same port names as in the block diagram. it will be easier, if you will share the all project. best regards arui
  7. A

    Servo component blocking my output pin.. how does it interfere with my other componen

    perhaps it is better you will post : project a (working project) [src +tb files] project b (with the servo) [src +tb files] then we might have a better chance to understand what you were doing wrong. you can rar them or zip them if possible,
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    Servo component blocking my output pin.. how does it interfere with my other componen

    hi kidi3 ------- 1. it is really hard to understand what your problem is from your depiction (what do you mean by "breaks the looks..."). 2. again you didn't use VHDL code syntax. 3. if you don't have any company security issues , you should always post your entire code. thanks a lot. arui.
  9. A

    Questasim signal report

    hi binome. of course you can do it. see following page for details : https://www.sigasi.com/content/vhdl-assert-and-report
  10. A

    SPI on FPGA - output 1 byte from one port?

    becasue now you don't read the data in the right place ... you need to start read it 2 cycles after you finished sending your 5 bit data command. what you need to do is to add internal signals like the state machine, and counter to your waveform. you don't need this debug signals at all. then it...
  11. A

    SPI on FPGA - output 1 byte from one port?

    kidi3 : lets look at din din has 50ns setup hold, you assert din after rising edge of SCLK, by that you create hold violation at the ADC.
  12. A

    SPI on FPGA - output 1 byte from one port?

    hi kidi3 still there is timing problem with DI, acording to datasheet it should be asserted after falling edge - so you might missing something here. please try to shift din so it's timing will be like in the datasheet. thanks.
  13. A

    SPI on FPGA - output 1 byte from one port?

    hi kidi3 try to give same waveforms for the same code. what is RX_LED final value - it should be all '1's as expected. (it is not fully shiown on the snapshot). thanks. arui
  14. A

    SPI on FPGA - output 1 byte from one port?

    hi KlausST if you look carefully you will see that kidi3 is injecting by simulation series of '1's (which actually look ok) so we are not talking about the "real world" yet. for the code itself : kidi3 please note : 1. there is a really weird clock generator process that have to be changed...
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    SPI on FPGA - output 1 byte from one port?

    hi. if you can please put code syntax (vhdl): see the following instructions : this will make the code much more easier to read!. thanks
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