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Recent content by arava prakash

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    materials used for metallization in chips

    greetings for the day. 1.which metals are used for metallization and contact between layers of a layout. 2. can we use normal metal for contacts instead of using tungstun which having high resistance ranges from (2 to 20 ohms) because metals have less resistance normally .02 ohms
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    some doubts on layout layers and contacts

    greetings for the day. i have doubts on layers in layouts 1.what is the major difference between contact,via, and tap 2.what is OD, RX layers.
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    resent areas developed in finite state machine

    thank you sir for reply i will take positively from now onwards i will be on that duty thank you sir.
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    resent areas developed in finite state machine

    hello any of you please give me the current research in the domain of implementation of finite state machine application
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    what is booming aspect in the case of traffic light controller

    hi any one of you please give me the current research in the case of implementation of traffic light controlling in now a days
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    seminar topics on testing and verification

    hello.... i am doing M.Tech in VLSI domain may i know the current research topics on testing and verification in vlsi design
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    current research topics in vlsi design

    hi i am doing M.Tech in VLSI course as i have to attend for seminar(in present semester) and project work (in final two semesters) my interest is do my seminar and project work on finite state machine (FSM). so please any one of you those have idea about the current research work on FSM...
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    internal circuit of op amp

    hi friends in general there are four stages in op amp what are and why four stages are used? what is thepurpose of using these stages please reply me with circuit diagram of op amp using MOSFETs
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    pico technology rather than nano technology

    why don't we go for pico technology rather than nano tecknology
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    [Moved]: doubt on PMOSFET SOURSE terminal conections

    generally PMOSFET bulk(substrate) terminal is connected to more positive voltage in the circuit but can we connect PMOSFET bulk(substrate) terminal to ground what happens if bulk terminal is connected to ground
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    pressure in the space

    what is pressure in the space and in the vacuum chamber
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    consideration of parasitic capacitance

    doubt on parasitic capacitance who is the one that considered first time the concept of parasitic capacitance in the circuits
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    consideration of parasitic capacitance

    how the parasitic capacitance exist in the circuit ?. why the parasitic capacitance is considered, what are the problems due ignorance of parasitic capacitance on performance of circuit
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    doubt on dangerous one in AC or DC

    many of the edaboard members are state like this but up to my knowledge (correct me if i am wrong) " current flows due to the voltage difference ", so how the current only does the damage - not the voltage. - - - Updated - - - As the force of attraction and reflection are equal in...

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