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Recent content by Anand15

  1. A

    Cmos inverter Design (Issue -output spike)

    option is there but error is coming...
  2. A

    Cmos inverter Design (Issue -output spike)

    Dear i am unable do atteched any file file or pics. what I'll do.
  3. A

    Cmos inverter Design (Issue -output spike)

    Hi all, I am designing a inverter in 0.25u tsmc tecnology. when i am doing transient simulating i am gatting spike. VDD=2.5V. spike around 0.1v. even the DC characteristic is perfect. Thanks & Regards Anand

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