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Recent content by analog123

  1. A

    How to improve the gain of two stage OTA

    Maybe you should check your circuits,make sure all the mos satuated.
  2. A

    why latches are used for cmos comparator design

    reason to use latch in cmos comparator For the hign speed. Preamplifier is used for kickback noise,Latch will provide high speed.
  3. A

    how to improve the THD of OTA

    It depends on the loading and input signal frequency
  4. A

    Constant Delay doesn't vary with voltage and temperature

    It depends what you are care for. If 10% can be accept, using bandgap voltage will be fine. The trimming needed if more precision is needed.
  5. A

    Design of an OTA in Subthreshold

    Maybe you should check your design not to suspect the Bsim3 model.
  6. A

    Design big delay element

    Mirror cap may be right
  7. A

    [SOLVED] Why vdsat is not equal to vgs-vth?

    Vdsat means enough resistor
  8. A

    Are your company's analog team includes the ESD designer ?

    Are your cxompany's analog team includes the ESD designer ? Yes,he will check the layout at last and give us advice what sizes is enough.
  9. A

    Troubles in design switched-capacitor cmfb

    Obviously you did a wrong simulation
  10. A

    how can I drawing a finger capacitance in coms digital pr

    Using the same metal level capacitor like the finger MOS figure,and four or five level metal level together .
  11. A

    ADC placement (DAC structure question)

    You should really know your question at first. Ask the people who give the spec and request.
  12. A

    how to get hspice level 1 model from the level 49 model?

    You can calculate the lamda though the .op parameter.but lamda is a variable parameter and helpless for your desigh.
  13. A

    Can anyone tell me some good paper for pipelined adc layout

    floorplan?Maybe the actual ADC floorplan is helpful if you can find the reveased circuit.
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