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Recent content by an_82

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    Hspice waveform problem

    Dear FvM, I increased the time (lower frequency), but it does not change. It is interesting that the same Netlist is simulated correctly in 2003 !!
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    Hspice waveform problem

    Hello all, I simulated a circuit in HSpice 2008. The problem is that the output waveform is not accurate and is segmented. Please see the attached picture. I used smaller step in .tran analysis, but it does not correct: .tran 1n 2u This problem does not exist in Hspice 2003.
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    Monte Carlo simulation for W/L+variaition oercent

    I want to do Monte Carlo simulation with Gaussian distribution for W/L (width/length) in HSPICE in 0.35um CMOS technology. How much variation percent should I consider ? and why?
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    Total Gm of OTA versus Frequency

    Dear erikl, I understood what you mean, but I could not get the desired output. I have two questions: 1. My circuit input is differential and the output is sigle-ended. How do I apply the input? I applied "ac=1 sin(0 1 1meg)" as the input voltage (in open-loop config.). 2. I putted a...
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    Total Gm of OTA versus Frequency

    How can I plot the total Gm of OTA circuit versus Frequency in HSPICE?
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    slew rate of OTA circuit

    I am simulating a trans-conductance circuit (OTA). I want to obtain pulse response of the circuit. So I applied a square waveform voltage as the input, then I see the output current. My question is that may I compare the output current waveform with input voltage and then calculate the slew...
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    output current of differential pair (Transconductor)

    Hello every one I want to calculate output current of differential pair circuit which is used as a OTA, but I could not obtain. I attached the related paper which claims From eq. (2)-(4) we can obtain the output current of eq. (5), unfortunately I could not obtain the result which they...
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    voltage adder/subtractor circuit

    Dear LvW, I can not use differential pair amplifier, because my desired output voltage should be single ended (one node). In fact I want to realize the circuit which do what you said: Vout=0.5*(v1-v2) but not double ended.
  9. A

    voltage adder/subtractor circuit

    1. So I can eliminate M2 and M6, and directly have V1 + V2 = Vou. right? 2. Do you use M0,1,2,3 for having more accuracy? ( cascode structure)
  10. A

    voltage adder/subtractor circuit

    To have better accuracy I will use your original circuit. two question: 1. What do M2 and M6 do? 2. Why do you put M0,1,2,3? I guess you utilized them to have cascode structure and more accuracy, right? Should we connect all of their gate to GND?
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    voltage adder/subtractor circuit

    Dear xiahanzh, Thanks for your reply. Could you please explain how it works? Is it possible to make it simpler? (less no. of transistors)
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    voltage adder/subtractor circuit

    Hi every body, I need a simple analog circuit consist of only MOS transistors to do this: Vo=(V1+V2)/2 Where V1 and V2 are DC voltages less than 1v. By the way the V2 can be negative e.g. the circuit should be work for (V1-V2)/2. If you have idea by using resistors it works for me. I can...
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    How does this circuit work?

    Dear LvW, Thanks for your reply, but as I said I know all of the expressions. I mean that how can I simulate the circuit (in Hspice)? I putted CMOS transistor level of OTAs, then if I apply iin1 ideally, since iin1= -io1, io1 should be equal to applied iin1, while it can be changed by its...
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    "Scientific publication" schematic drawing

    I recommend microsoft visio which is an excellent tools to draw circuit. I use this software in my own published papers. Also you can try this website: www.digikey.com/schemeit‎
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    How does this circuit work?

    I studied a paper attached with this post . I have a question about Fig. 3 which is also attached where a topology to realize multiplier circuit has been presented: How can we apply "iin1" to "EOTA1"? In the paper it is mentioned that "gmT1" has a direct proportion to "IBE1", when we change...

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