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1- dont use bit_vector since you will make a calculation
2- in 30 line you wrote to get the length of val and you didnt desided the length of it.
3- try to write it by RTL it is better.
please i want site to download the linux suse (free)
and please i want tutorial to help me to use it .
the linux suse used in RTOS??
thanks
--
alie eldin
adc in fpga
hi
for example if you work the FPGA or CPLD on 50Mhz you will make clock divider to get the 40Mhz which will operate the ADC
and then make process with sensetivity list on (input clock and the input data from ADC)
this process will operate when the rising edge of clk or the...
horizontal_counter(3)
this is program of the VGA but to work please tell me the logical error
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module ff (red_out,clk50,green_out,blue_out,hs_out,vs_out);
input clk50 ;
output red_out ;
output...
i have spartan 3 starter kit of FPGA
please send for me verilog VGA program to write only one character and please by comments and the clock input
--
alie eldin
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