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Recent content by aliabbass

  1. A

    vhdl code simulation

    hi very thanks ,i find my response from your answer.
  2. A

    vhdl code simulation

    hi ,thank .may be give more information about your mean how i must make inout tristate?
  3. A

    vhdl code simulation

    hi ,i wrote a vhdl code for a common bus(8 bit) that have four registers and simple alu that do some simple logical and arithmetic operation.r0,r1 and r3 inputs are connected to bus and r2 input is connected to alu output.r1 and r2 output like r0 and r3 are connected to bus via muxs and...
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