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Recent content by alexglvr

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    Altium : Bad net name

    Hello, I have a problem under Altium. I linked the TOTO signal of a component to GND and now on my PCB, all my GND have been named TOTO....:cry: Thank you for your help, Alex
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    ALTIUM: Multi Part Component and PCB / Schematic link ?

    I read it, but do not manage to find how to deal with my case... I spent the morning trying things, and i now have more informations... Here is my schematic Hierarchy : TOP.sch ..|_FPGA.sch ........|_Bank0.sch ........|_Bank1.sch ........|_Bank2.sch ........|_Bank3.sch ........|_Supply.sch...
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    ALTIUM: Multi Part Component and PCB / Schematic link ?

    Hello, In a the schlib of my altium project, I defined a Xilinx FPGA as a multi-part component (PARTA : Bank0, PARTB : Bank1, PARTC : Bank2, PARTD : Bank3, PARTE : Supply). I decided to use hierachical schematic design with one sub schematic per FPGA Part. Then, an upper lever schematic...
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    trace length and overlapping?

    Hello, I am routing LVDS signals under altium, and I noticed that sometime, when using round corners, the same part of the trace is appearing several times. As a consequence, when I try to match the signal length, I can not be sure of the length value specified by altium as it computes it by...
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    Circuit repetition on a PCB ??

    In my top schematic, I have several instance of the same schematic. I then have a structural schematic hierarchy (as it is presented in the wiki **broken link removed**) When I update my PCB, altium generates several "rooms" each of them being associated to a sub schematic.... When I update...
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    Circuit repetition on a PCB ??

    Hello, I am working a Board design using Altium Designer in which a part of the board is repeated 5 times. I then defined this repeated part of the circuit into a sub-schematic. I would like to route this part of the schematic only once... How can i do that? Thank you for your help, Alex

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