Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Recent content by Alex_Zhan

  1. A

    Why the output power of VCO (Oscillator) is so small?

    Dear BigBoss and freebird, I use the open-drain buffer to output the signal. This is the schematic of the buffer. For better test, I use single-ended output, and the other port is connected by a 50 Ohms resister. Besides, I use the biastee for testing, the OP terminal is the port after the...
  2. A

    Why the output power of VCO (Oscillator) is so small?

    Dear everyone, I have designed a VCO operating at ~60GHz, the DC power at the output net is 14.6dBm, while the power of fundamental wave is only ~27.6 dBm? Does anyone know the reason? Here is the output power, thanks very much! 1678364087 -27.6 dBm
  3. A

    how to draw slash line in cadence schematic

    Thanks deeply!
  4. A

    how to draw slash line in cadence schematic

    Does anyone know how to draw slash in cadence schematic like below? Thank you deeply!
  5. A

    Simulation results between HFSS and Sonnet

    Dear all, I simulated a simple inductor in HFSS and Sonnet. The inductance value is similar, however, the Q value simulated by HFSS is much smaller than that obtained by Sonnet. I am very puzzled at this, does anyone know the reason?
  6. A

    How to choose the proper kind of transistor before IC design

    Hello everyone, I want to consult you that how to choose a proper kind of transistor before your design. For example, if I want to design a PA, should I choose NMOS or NMOS_rf transistor? How about the voltage? I designed IC before, but choose the same transistors which my friends used. While I...
  7. A

    How to add the model library in ADE XL?

    Dear all, I want to simulate the schematic of an easy circuit, but failed. I checked and found I don't add the model library, but how many files should be added and which ones? I am still puzzled. Does anyone know? Besides, what's the meaning of 'tt' in the 'section'? Thank you very much.
  8. A

    devices mismatch in LVS check

    Thank you sincerely, it does help me. I solved this problem by checking the labels of the ports which connect these transistors in the layout.
  9. A

    devices mismatch in LVS check

    Hello everyone, when I do LVS check in cadence, I find this problem in the picture. This layout can pass the DRC check, and I am sure the devices in the layout are the same as the ones in schematic. Does anyone know the reason? Thank you deeply!
  10. A

    the inductive impedance connected to drain can cause negative resistance at gate?

    Hello everyone! I read a paper but I am puzzled when I read this sentence. In my mind, I think the resistance at gate is extremely large, how can it became negative after an inductive impedance is connected to the drain?
  11. A

    Problem with ADS license

    Re: problem with ADS license yes, you are right. I use IHP process, but how can I solve this problem?:thinker: Thank you.
  12. A

    Problem with ADS license

    Hello everyone! I want to simulate the schematic in ADS, but the problem occurs when I change a new designkit. While, I can simulate succesfully by using another designkit. Does someone know te reason? Thanks a lot!
See more

Part and Inventory Search

Back
Top