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Recent content by alenhan

  1. A

    How to consider the gound bounce in analog circuit?

    you need package model, include the package in you simulation file.
  2. A

    How to calculate the value of a capacitor to maintain VCCOUT

    Capacitor Hi, I think the drop is due to the charge sharing to the parasitic cap. from the diode connected NMOS, in one clock cycle C*(1.8-0.5)=(C+Cpar)*VCCOUT_min so if the C is much larger than Cpar, the VCCOUT can be more close to VCC-Vthn.
  3. A

    Chip Reliability & Burn In

    Hi, the reliability means how long does this chip works, or due to leakage the life time of the chip. another factor is under high power supply, does the chip or devices work well or not. the burn in means test the device under low supply voltage, high temp. or put the device under critical...
  4. A

    What is the purpose of the series resistor and external cap?

    Buffer compensation? Hi, jordan 76 the res. and the cap. are for compensation the phase margin, the designer want the dominate pole at the last stage, to improve the stability.
  5. A

    how low frequenct signal affects the high frequency signal

    Cross talk! I think cross talk sometimes is an issue, it can be decreased by special layout routeing,
  6. A

    Analog power supply and regulators

    analog power supply Yes, if analog block is sensitive, you need another regulator to supply power for digital block. because badgap reference is very sensitive to digital signal. the digital part will affect reference signal, so your regulator can not get accurate voltage
  7. A

    the p+ resistor in analog design

    if you have P+ resistor model, it should be included in spice model
  8. A

    Question about HSpice & Spectre

    the model of Hspice and Spectre have differenc format, you should take care
  9. A

    design of integrated circuits

    sometimes the book can not be download
  10. A

    Analog job interview questionaires !!

    I can not down load this book
  11. A

    analog design flow...

    maybe you also need to learn Hspice
  12. A

    LDO at full load goes out of regulation

    LDO at full load maybe you need to check the driver ability of pass transistor
  13. A

    How to properly do AC open loop LDO simulation?

    how to do ac analysis of ldo another way is add a large inductor on you feedback path, and a capacitor connect to ground from opamp side. this may help you to do AC simulation.

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