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Recent content by albert1905

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    How to use fpga external memory, steps I already did, questions about them, and how to

    Re: How to use fpga external memory,steps I already did, questions about them, and ho Yes it does sounds familiar, I used "DDR2 SDRAM controller with UniPHY", and I thought that the avalon is inside this ip unit. That's why in the interface i have those pin: .avl_ready(avl_ready), //...
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    How to use fpga external memory, steps I already did, questions about them, and how to

    How to use fpga external memory,steps I already did, questions about them, and how to first I will mention that I read abut still couldn't fully understand :"external memory interface handbook volume 2", and the questions are things that I'm still struggling to understand and need your help...
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    System verilog - streaming-operator-multidimensional array to a stream of bits

    Re: System verilog - streaming operator multidimensional array to stream of bits that is a nice idea Ill try to implement . And no its not.. https://www.asic-world.com/systemverilog/operators6.html Thanks
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    System verilog - streaming-operator-multidimensional array to a stream of bits

    System verilog - streaming operator multidimensional array to stream of bits Hi guys, I cant figure out how to take multidimensional array such as: bit unsigned [10:0] img [3:0][3:0]; And make this array as a stream of bits. Think of it as an 4X4 image that each pixel is 11 bits in...
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