Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hi Guys,
I am running my Postlayout simulation in NCSIM. Is there a way to find the delay between any two nodes using Tcl commands??
Suppose, I have a memory library "mem" whose timing parameters are provided in the SDF file as
below. (a portion of..)
(IOPATH (posedge CLK) Q[0]...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.