Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
which is the best method in placement?
1. while placement itself we apply the necessary skews to clocks which we need to attain in CTS by modifying the sdc.
2. not applying any skews in the placement stage and applying skews only in CTS stage and doing a post CTS optimization
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.