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Recent content by achilles09

  1. A

    weak inversion mode

    Vgs-Vt reduce to below about 80mV.
  2. A

    how to elimilate the 1/f noise of the first intergaror in sigma delta modulator

    you are wrong ! 1/f noise is low frequecy noise, how can it be filtered by digital filter? as you said, chopper tech must be used, then 1/f noise can be filtered by the following digital filter.
  3. A

    how to elimilate the 1/f noise of the first intergaror in sigma delta modulator

    In the design of single loop 3 ordersc sigma delta modulator ,how to eliminate the 1/f noise of the first intergator beside the chopper theck ? Also ,due to the suppress of the noise tranfer founction in low frequency , the cap of second and third integrator can be very small, but how to...
  4. A

    clock jitter in sigma delta ADC

    hello ,everyone. is it hard to implement a sample clock with 0.5ns jitter in SC sigma delta ADC?
  5. A

    how to implement the dwa Algorithm of multi bit sigma delta modutor?

    rt,how to implement the dwa Algorithm of multi bit sigma delta modutor in circuit level?
  6. A

    how to implement non delay integrators in sigma delta adc?

    how to implement non delay integrators in sigma delta adc? for example , in CRFB and CRFF structures of single loop sd_adc.:-(
  7. A

    8 to 256 decoder design in voltage scaling DAC

    I am now design a 8 bit voltage scaling DAC, I need a 8 to 256 decoder ,how to do it ? thank you !
  8. A

    the input common voltage of opa in sigma delta modulator

    the picture is in the attachment , how to settle the input common voltage of the ota in the picture .In my opinion, it seems can't settle the input common voltage of the ota ?
  9. A

    When we can talk about phase margin ?

    in some papers ,they concerns the phase margin when gain is 0 dB, but when when the loopgain is not come to 0, the phase margin is not enough, is this not important?
  10. A

    sigma delta ADC modeling by simuling

    hi, every one, i am modeling the second order modulator , how to model the 1 bit quantizer ,just replace it with a comparator , can i get some model examples? thank you all.
  11. A

    how to test the bode graph

    Thank you very much!:D
  12. A

    how to test the bode graph

    no, the buffer is independently in a chip, i don't know how to test it's -3dB bandwith, which device i should use? thank you !
  13. A

    how to test the bode graph

    bode graph There is a buffer in a chip, I want to test it's bandwith ,but how to do it ? Thank you all!

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