erikl
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Yesterday, 21:21shanmei started a thread Light dependent resistor(LDR) with very low resistance in Analog Circuit DesignWhy I never find a light dependent resistor having very low resistance (around 20 ohms) when lighting? Does anyone know? Thanks.2 replies | 24 view(s) -
Yesterday, 09:37How about a simple (large) resistor? Do you need linear tuning?5 replies | 122 view(s) -
13th December 2018, 16:49erikl replied to a thread complementary input folded cascode opam in Analog Integrated Circuit (IC) Design, Layout and FabricationHi Junus, I think there is a misunderstanding: the bias voltages for the wide swing mirrors are Vbias3 and Vbias2, not Vbias4. This above...11 replies | 491 view(s)
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13th December 2018, 16:29Do you speak about a commercial OTA unit? In this case, the data sheet gives you some information about the corresponding pin and the internal...5 replies | 122 view(s)
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11th December 2018, 00:03erikl replied to a thread complementary input folded cascode opam in Analog Integrated Circuit (IC) Design, Layout and FabricationNo, there are current sources at the bottom and also at the top: these are Cascode or High-Swing current sources - like in this image: ......11 replies | 491 view(s)
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9th December 2018, 14:04Dominik Przyborowski replied to a thread Tektronix 4000 series oscilloscopes - question about measurements and statistics in Elementary Electronic QuestionsI was in the lab a very long time ago, so I do not trust to me memories now. However, the tektronix scopes has various measurement functions (like...4 replies | 315 view(s) -
7th December 2018, 22:42The UHF RFID frequency band is 860-960MHz. Different countries have different frequency bands among 860-960MHz. Packages with tags are...1 replies | 206 view(s)
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7th December 2018, 19:08Dominik Przyborowski replied to a thread Voltage drop across cascode amplifier in Analog Circuit DesignCascode transistor and it biasing can be considered as so-called "gate follower". In the first figure, source terminal of Q4 copying the source...2 replies | 139 view(s)
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7th December 2018, 18:10erikl replied to a thread complementary input folded cascode opam in Analog Integrated Circuit (IC) Design, Layout and Fabricationfrankrose is right: "Try SCE to AUX." /John Aaron/. It really worked, then ;-) Your circuit question about the function of this high swing cascode...11 replies | 491 view(s)
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7th December 2018, 09:54Your question is not quite clear to me. The slew rate is identical to the maximum possible large-signal rise time of the opamp (with feedback !!)....5 replies | 246 view(s)
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6th December 2018, 18:34erikl replied to a thread Well diode layout and structure in Analog Integrated Circuit (IC) Design, Layout and FabricationDepends on your PDK ...1 replies | 121 view(s)
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5th December 2018, 13:13The CMFB compares between your "output common mode" and "desired common mode" and feeds back a negative signal for regulation. The desired CM voltage...3 replies | 213 view(s) -
5th December 2018, 13:06The CMFB used to give a separate DC CM gain at the output. Here you are sensing second stage output (which is indeed the "main" output) and...2 replies | 173 view(s)
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4th December 2018, 19:32Before chapter 12 is a chapter 4 in this book. Read it, there is an answer for your question.3 replies | 213 view(s)
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1st December 2018, 22:15deveshkm started a thread [SOLVED] Difference in designing opamp as amplifier and comparator in Analog Circuit DesignWhat is the difference in designing opamp as amplifier and comparator?4 replies | 199 view(s)
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1st December 2018, 16:18Thanks for all your relies. You are right that the sampling process is not ideal. For example, at the sampling time, if the original signal is...7 replies | 336 view(s)
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30th November 2018, 18:30erikl replied to a thread Antenna Protection between Diode Cell and Well ring. in Analog Integrated Circuit (IC) Design, Layout and FabricationYes, you can. But you should take care that the M1 connection wire to the V12 via isn't too long, otherwise you'd risk an antenna violation error at...4 replies | 301 view(s)
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30th November 2018, 17:35erikl replied to a thread Symbolic links with in script in Analog Integrated Circuit (IC) Design, Layout and FabricationRemove the "to" between the two file names. user$area must be defined, of course.1 replies | 159 view(s)
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30th November 2018, 07:39LvW replied to a thread How to derive cut-off (or center) frequency formula for attached LC filter circuit? in Analog Circuit DesignAre you sure that there is no resistor between the signal source and the L1-C2 path? Otherwise, the circuitry makes no sense.8 replies | 355 view(s)
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28th November 2018, 03:31deveshkm replied to a thread [SOLVED] Power on reset and power okay circuits in Analog Circuit DesignWhat is the difference in POK and POR?5 replies | 226 view(s)
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27th November 2018, 20:57Hi, I need to know working of POR and POK circuits Standard POR seems to be a comparator Can there be multiple POK within one POR? Please...5 replies | 226 view(s)
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26th November 2018, 20:46For learning purpose, I think it doesn't really matter which spice models you use. BSIM3v3 spice models are fine for getting acquainted with the...2 replies | 202 view(s)
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25th November 2018, 10:52An ideal 2nd-order notch filter has zero gain at the notch frequency wz. Here, wz is the zero frequency of the transfer functions numerator. An...3 replies | 249 view(s)
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24th November 2018, 21:55erikl replied to a thread Circuits capable of compensating leakage in Analog Integrated Circuit (IC) Design, Layout and FabricationWith a very long NMOS at the output, controlled by the output control voltage, or with a normal NMOS at the output, controlled by Vgs < Vth...9 replies | 499 view(s)
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23rd November 2018, 22:02erikl replied to a thread diode ESD IO with proper size in Analog Integrated Circuit (IC) Design, Layout and FabricationThere may be more ESD jeopardy than the 2kV HBM test: other possible ES sources could intrude with more energy, albeit less voltage. Transistor based...3 replies | 346 view(s)
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23rd November 2018, 21:38erikl replied to a thread Wellbody layer in tsmc in Analog Integrated Circuit (IC) Design, Layout and FabricationCould mean the p-substrate of the wafer, or - more likely because of its name - the p-substrate (= p-body) of an isolated p-well in n-well.2 replies | 285 view(s)
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23rd November 2018, 21:14erikl replied to a thread Antenna Protection between Diode Cell and Well ring. in Analog Integrated Circuit (IC) Design, Layout and FabricationAdding a diode close to the gate surely is the safest method against the antenna effect jeopardy - particularly if there is no direct M1 connection...4 replies | 301 view(s)
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22nd November 2018, 18:58If a signal m(t) has a maximum frequency of 1KHz, and a 10 bit ADC with 10K samples/second rate to sample the signal m(t). According to the...7 replies | 336 view(s)
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19th November 2018, 19:30shanmei replied to a thread Generation of Vcm in LVDS driver in Analog Integrated Circuit (IC) Design, Layout and Fabrication=3.5mA X100/2=175mV, which is half of the total swing.6 replies | 336 view(s)
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19th November 2018, 19:09shanmei replied to a thread Generation of Vcm in LVDS driver in Analog Integrated Circuit (IC) Design, Layout and FabricationThe swing is 350mV with 100mA current going through 100 ohm resistor. The middle point is 1.25V, so the swing is between 1.075-1.425V.6 replies | 336 view(s)
About erikl
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- Area of specialization:
- Analog Circuit Design
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- Biography:
- designed (and layouted) analog cells and IP's in various CMOS processes
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- Germany
- Interests:
- analog design in CMOS
- Occupation:
- on my own
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