FvM -

Today, 07:36

FvM replied to a thread [SOLVED] Half Wave Rectifier when input voltage is negative in Elementary Electronic Questions

Although rail-to-rail output is nearly a standard in general purpose OPs these days, you still have specialized devices that can't achieve it due to...

7 replies | 193 view(s)

Today, 07:30

FvM replied to a thread Verilog code for BCD to Floating point representation in PLD, SPLD, GAL, CPLD, FPGA Design

Regarding the text in "updated diagram", seems like you are repeating questions that have been already answered throughout this thread.

29 replies | 619 view(s)

Today, 07:28

FvM replied to a thread ozonated liquid material compatability in Miscellaneous Engineering

Actually asking about saturated solution (≈100 mg/l) ? Usual water sterilization concentrations as discussed in the quoted article are far below....

4 replies | 79 view(s)

Today, 02:40

syedshan started a thread Does an eNB knows the location of a UE in Digital communication

Hi all, In cellular communication, does the eNB knows the location of UEs it is serving. If yes, then what procedure does it follows?

0 replies | 59 view(s)

Yesterday, 22:47

FvM replied to a thread Verilog code for BCD to Floating point representation in PLD, SPLD, GAL, CPLD, FPGA Design

Although the OP requested a factor of 1/4095, it's not necessarily the exact solution. Most 12-bit ADC have a quantization step of Vref/4096. If you...

29 replies | 619 view(s)

Yesterday, 18:03

FvM replied to a thread gyroscopes and LP filter in Analog Circuit Design

It certainly doesn't mean this, just say the low pass bandwidth is greater than 60 Hz.

9 replies | 198 view(s)

Yesterday, 17:57

FvM replied to a thread Verilog code for BCD to Floating point representation in PLD, SPLD, GAL, CPLD, FPGA Design

First part of your answer (ADC result scaling to integer millivolt) has been already discussed in post #6 and #7. BCD conversion with /10 division...

29 replies | 619 view(s)

Yesterday, 17:15

FvM replied to a thread [SOLVED] ltspice hierarchical circuit error in PCB Routing Schematic Layout software and Simulation

Why don't you start with the test circuit in post #5? The simulation runs with no errors.

10 replies | 278 view(s)

Yesterday, 07:14

FvM replied to a thread 50/30 ohm coax adapter in RF, Microwave, Antennas and Optics

Minimum loss means 6.5 dB in this case. Is it acceptable for the application?

7 replies | 186 view(s)

Yesterday, 07:01

FvM replied to a thread gyroscopes and LP filter in Analog Circuit Design

There are two motivations for the low pass: - reduce the gyroscope signal noise bandwidth and respective variance - filter out residuals of...

9 replies | 198 view(s)

Yesterday, 06:57

FvM replied to a thread [SOLVED] ltspice hierarchical circuit error in PCB Routing Schematic Layout software and Simulation

The same .asc and .asy is already attached in my post. But you didn't show a circuit importing the Memory symbol. What's your problem at all?

10 replies | 278 view(s)

Yesterday, 06:53

FvM replied to a thread Modifying an ATX power supply in Hobby Circuits and Small Projects Problems

The article is about converting an ATX device into a single output variable voltage supply. That should work under circumstances. But it's not...

4 replies | 182 view(s)

17th June 2018, 14:46

FvM replied to a thread IR2110 High Side Problem in Power Electronics

Nothing has been said about DC link voltage, SS34 (40 V schottky) can work for low voltage. But bootstrap capacitor of 100 nF works in no way for 50...

6 replies | 201 view(s)

17th June 2018, 14:38

FvM replied to a thread [SOLVED] ltspice hierarchical circuit error in PCB Routing Schematic Layout software and Simulation

I don't understand what your problem is. You can instantiate the symbol and connect it. Apparently a correct net list is generated. The best way...

10 replies | 278 view(s)

17th June 2018, 14:17

FvM replied to a thread adjustable voltage and current power supply in Power Electronics

In relation to the intended function (adjustable constant I/V power supply with switch mode pre-regulator), the circuit isn't overly complex at first...

10 replies | 320 view(s)

17th June 2018, 12:02

FvM replied to a thread Noise in CMOS Inverter in Analog Circuit Design

Which simulation circuit are you talking about? The input can be either biased with a DC source, or a DC feedback circuit. Using a DC feedback...

32 replies | 1162 view(s)

17th June 2018, 11:34

FvM replied to a thread Noise in CMOS Inverter in Analog Circuit Design

Sounds like you have forgotten the thread questions in the meantime. The problem was to measure output impedance. You necessarily need to ground the...

32 replies | 1162 view(s)

16th June 2018, 08:46

FvM replied to a thread [SOLVED] what are the risks for isolating test equipment by negating earth ground in Elementary Electronic Questions

The idea of an isolation or safety transformer is to provide a supply voltage without earth connection. Respectively they are exposing the output...

9 replies | 312 view(s)

16th June 2018, 08:34

FvM replied to a thread Trying to pass and return a variable to a function returns uneffected value in Microcontrollers

The usual solution is to pass the variable by reference rather than by value. Review your C programming text book. void Filter(unsigned int...

6 replies | 461 view(s)

15th June 2018, 12:27

FvM replied to a thread [SOLVED] what are the risks for isolating test equipment by negating earth ground in Elementary Electronic Questions

Test equipment, e.g. an oscilloscope, is usually designed to be operated with PE connection. Leakage currents and insulation parameters are not...

9 replies | 312 view(s)

15th June 2018, 10:37

FvM replied to a thread Transmit data by Connect two ADSL modems over copper telephone line up to 1KM in Digital communication

No. By definition of term, DSL uses telephone lines. I just noticed, that some products are advertized, didn't check about prices and availability. ...

15 replies | 680 view(s)

15th June 2018, 06:20

FvM replied to a thread digital pot rather than analog pot in Analog Circuit Design

Connect P0A to a virtual ground node, a sufficient large capacitor to ground (e.g. 1 µF) and a voltage divider generating Vdd/2. It's not obvious...

7 replies | 198 view(s)

15th June 2018, 06:07

FvM replied to a thread Loop-gain calculation in Analog Circuit Design

As already mentioned, the circuit can be used in a way that doesn't establish feedback across the outer terminals. If the amplifier cell is an OP IC...

26 replies | 683 view(s)

14th June 2018, 23:03

FvM replied to a thread Loop-gain calculation in Analog Circuit Design

Apparently the professor did a bad job in conveying the purpose of the analysis. But I absolutely disagree about "inefficient and outdated"....

26 replies | 683 view(s)

14th June 2018, 15:58

FvM replied to a thread Phase peering RF cable assemblies in RF, Microwave, Antennas and Optics

I don't recognize a commonly understood technical term. You should tell where do you see the term, e.g. a quote with context.

3 replies | 210 view(s)

14th June 2018, 15:47

FvM replied to a thread Loop-gain calculation in Analog Circuit Design

Why particularly the "actual" input? A loop is created by feeding back a signal from amplifier output to input. In the given circuit, the drain node...

26 replies | 683 view(s)

14th June 2018, 15:40

FvM replied to a thread Verilog code for BCD to Floating point representation in PLD, SPLD, GAL, CPLD, FPGA Design

A bit of guessing, yes. Post #3 however suggests scaling to 3.3V, post #11 4 digits.

29 replies | 619 view(s)

14th June 2018, 09:36

FvM replied to a thread digital pot rather than analog pot in Analog Circuit Design

Not sure what you mean with "tiny sound fluctuations"? An effectively useless description. You missed however to tell the used digipot type and...

7 replies | 198 view(s)