FvM
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Yesterday, 22:02FvM replied to a thread What do you call a ceramic SMD cap in a metal frame? in Elementary Electronic QuestionsThat's the idea. Better withstanding mechanical and thermal stress.4 replies | 318 view(s) -
Yesterday, 21:59Yes, you want to read the data sheets. They have 200 V cathode to heater voltage limit.15 replies | 408 view(s)
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Yesterday, 21:481 yes 2 no. There's no way to disable FRC separately.1 replies | 50 view(s)
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Yesterday, 17:17My VHDL tool says it's -3, no reason to doubt about. Please review numeric_std.vhd how it's calculated. if XL(XL'LEFT)='1' then XNUM :=...9 replies | 538 view(s)
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Yesterday, 08:46FvM replied to a thread Design and construction of scintillometer for evapotranspiration in MicrocontrollersNo. Water vapor NIR lines have about 10% absorption for 1 km atmospheric path according to literature. You can well detect it with a simple...18 replies | 1558 view(s)
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18th May 2019, 23:07FvM replied to a thread [moved] Convergenge issue PSpice- LM5022 in Software Problems, Hints and ReviewsIf the examples are working, it should be possible to move towards your circuit. I admit that SPICE convergence issues can be annoying and are...14 replies | 328 view(s)
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18th May 2019, 22:53Your implementation is different from links page 5 in two regards. - due to lack of a negative supply, the rectifier output for positive input isn't...7 replies | 489 view(s)
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18th May 2019, 18:00As far as I understand, the OP wants to implement MOD operation for power of two denominator. That's of course possible without a divider.9 replies | 538 view(s)
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18th May 2019, 17:57FvM replied to a thread [moved] Convergenge issue PSpice- LM5022 in Software Problems, Hints and ReviewsDid you try to run the PSPICE examples provided by TI along with the model?14 replies | 328 view(s)
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18th May 2019, 17:39Near. You calculate 1 MOD -4 = (1 MOD 4) - 4 = -3.9 replies | 538 view(s)
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18th May 2019, 15:12FvM replied to a thread Parallel connection of multiple half-bridge for high current motor applications in Power ElectronicsBootstrap driver has a number of limitations, particularly not providing 100 % duty cycle and requirement of a specific startup sequence. Can't you...22 replies | 1590 view(s)
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18th May 2019, 15:02FvM replied to a thread Generate random sequence of 1's and -1's in matlab in Elementary Electronic QuestionsBy nature of random distribution, an arbitrary selected sample can't have exactly zero mean otherwise it's not random. You may want to specify...5 replies | 537 view(s)
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18th May 2019, 13:41FvM replied to a thread hfss: copper spiral antenna modeling problem in Electromagnetic Design and SimulationNot clear what you want to achieve. What's the purpose of the double layer? Ground directly below the coil will create a short.9 replies | 667 view(s)
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18th May 2019, 10:13I presume you are asking about precision rectifier. Come back with the schematic that doesn't work for you.7 replies | 489 view(s)
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18th May 2019, 09:52Presently, your question is missing any substantial specification (voltage, current, signal frequency, switching speed). Did you intentionally strip...4 replies | 239 view(s)
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18th May 2019, 09:48FvM replied to a thread Parallel connection of multiple half-bridge for high current motor applications in Power ElectronicsCree CAS300 modules are of course using multiple dies, like other high current MOSFET or IGBT modules. In contrast to parallel connection of...22 replies | 1590 view(s)
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18th May 2019, 08:50Presume you are asking about VHDL. You can review ieee.numeric_std library how mod and rem are evaluated. Both are finally referring to unsigned...9 replies | 538 view(s)
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17th May 2019, 16:18FvM replied to a thread Design and construction of scintillometer for evapotranspiration in MicrocontrollersLIDAR is an umbrella term for instruments with quite different purpose and operation details. You have simple laser distance sensors, scanning...18 replies | 1558 view(s)
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17th May 2019, 15:55FvM replied to a thread Phase and frequency locking multiple (9 units) LLC drivers that are each 10cm apart in Power ElectronicsThe synchronous rectifiers are acting as full wave rectifiers and sourcing DC current. The pulsating current output of both LLC has ripple with...15 replies | 357 view(s)
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17th May 2019, 15:41FvM replied to a thread Parallel connection of multiple half-bridge for high current motor applications in Power ElectronicsIn typical switching applications, source inductance is the limiting factor for switching speed and will almost perfectly balance the current rise...22 replies | 1590 view(s)
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17th May 2019, 13:52FvM replied to a thread Vivado Taking A Long Time To Run Synthesis & Implementation in PLD, SPLD, GAL, CPLD, FPGA DesignSounds like a poorly designed (e.g. pure combinational) sha implementation which hardly meets timing.3 replies | 108 view(s)
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17th May 2019, 13:47FvM replied to a thread Phase and frequency locking multiple (9 units) LLC drivers that are each 10cm apart in Power ElectronicsPost #5 shows a parallel connected LLC with output capacitor, using this topology, there's no need to synchronize the converters. Load balancing may...15 replies | 357 view(s)
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17th May 2019, 13:36FvM replied to a thread Including VHDL libraries to add two signals in PLD, SPLD, GAL, CPLD, FPGA DesignI would use numeric_std only and an unsigned constant.8 replies | 773 view(s)
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17th May 2019, 13:26You should be able to detect if the components are populated in the actual instrument, isn't it?3 replies | 151 view(s)
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16th May 2019, 22:16FvM replied to a thread Parallel connection of multiple half-bridge for high current motor applications in Power ElectronicsIt's reasonable to implement the motor driver as multi phase converter to reduce input and output ripple current.22 replies | 1590 view(s)
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16th May 2019, 11:43FvM replied to a thread how to design a thermostat without Microcontroller? in Analog Circuit DesignThe temperature differences observed with an on-off or "bang-bang" controller due to process transfer function are not hysteresis, but they are...64 replies | 2223 view(s)
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16th May 2019, 08:07No, you don't if you want a true integrator. Adding parallel R creates a lossy integrator respectively first order low pass. The "DC" of an...2 replies | 377 view(s)
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15th May 2019, 17:06Hello, I am designing an integrator of a continuous time sigma delta ADC using a fully differential amplifier on cadence with input freq 1.5MHz and...2 replies | 377 view(s)
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15th May 2019, 08:18FvM replied to a thread New Project! Looking for suggestions with spectrum analyzers in Digital communicationAn external coaxial or waveguide detector operated as harmonic mixer, that's how old style spectrum analyzers like Tek 491 covered the higher GHz...3 replies | 172 view(s)
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