FvM
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Today, 13:10FvM replied to a thread Motor pump starter connection with two relay to operate manual and auto in Hobby Circuits and Small Projects ProblemsDouble pole PCB relays are surely available, you should however talk about current rating. The original manual circuit has the disadvantage that the...8 replies | 269 view(s) -
Today, 12:10Of course you need to take care of the number range. Under circumstances, the multiplicand must be casted to long before multiplying with 62.3 replies | 206 view(s)
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Today, 12:02You don't need to disassemble it to know how it works. Some MCB series have a mechanical interface for auxiliary modules, either signal contacts...1 replies | 83 view(s)
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Today, 11:42If we abstract from all parasitic elements like MOSFET capacitances, only have a single pole OP and ideal gm, the OP pole translates into a zero in...7 replies | 279 view(s)
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Today, 05:41Mithun_K_Das replied to a thread Reducing RAM & ROM consumption in coding in Digital Signal ProcessingThat means if I write 62/100 instead of 0.62 (if use integer math) it will consume less ROM&RAM. Yes! I changed it and it saved a lot of RAM & ROM.3 replies | 206 view(s) -
Yesterday, 18:51Miller capacitor is inside the OP, it modifies av and Zo.5 replies | 225 view(s)
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Yesterday, 13:36The problem is about extracting Zi, Zo and av from your circuit. As mentioned in your previous thread, an OTA could be better modelled as a current...5 replies | 225 view(s)
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Yesterday, 13:22FvM replied to a thread Require a Desgin of A MOSFET based Switch , for study purpose . in Power ElectronicsYou are still missing a basic understanding of MOSFET operation. To get a better idea, you can use the post #9 simulation circuit and perform a dc...19 replies | 834 view(s)
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Yesterday, 08:35FvM replied to a thread Testing Amps on rewound microwave transformer in Elementary Electronic QuestionsMagnetron transformer is special design (with artificially increased leakage inductance) to achieve constant current output. It's no well suited for...6 replies | 249 view(s)
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Yesterday, 08:12I missed the link in the original post. Please upload schematics with the post, as required by forum rules. Loop gain analysis has to be performed...7 replies | 279 view(s)
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16th January 2020, 18:00You have implemented float math for a few calculations that can also use integer math. Dropping the float library will save a lot of ROM, unless you...3 replies | 206 view(s)
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16th January 2020, 17:09FvM replied to a thread Require a Desgin of A MOSFET based Switch , for study purpose . in Power ElectronicsShould be considered ohmic range, isn't it. The supply voltage is dropped at R1.19 replies | 834 view(s)
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16th January 2020, 15:54How can I rewrite this code to use less RAM & ROM? ADC: 10bit. Speed: 1MSPS. Data input range: 0-5V. CPU: DSPIC30F2010; 16bit. This code is...3 replies | 206 view(s)
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16th January 2020, 15:46Why are you repeating the inappropriate description? Your send code can be shorted as UART_send_string("ABC"); There's absolutely no problem...10 replies | 436 view(s)
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16th January 2020, 15:37You have to calculate the closed loop transfer function by superimposing all branches. You can't predict its poles and zeros by looking at individual...7 replies | 279 view(s)
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16th January 2020, 15:24DC gain of the low pass filter is just a synonym of pass band gain. Of course there should be no DC offset generated, apart from very small rounding...5 replies | 217 view(s)
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16th January 2020, 10:06dpaul replied to a thread FPGA Re-Verification after minimal initial verification with Microsemi IGLOO2 in PLD, SPLD, GAL, CPLD, FPGA DesignAre you talking about LEC? Here is a list of widely used LEC tools - https://en.wikipedia.org/wiki/Formal_equivalence_checking and they are...2 replies | 265 view(s) -
16th January 2020, 09:37FvM replied to a thread Require a Desgin of A MOSFET based Switch , for study purpose . in Power ElectronicsV1 is the supply voltage, not Vds. Vds in on-state is in the mV range, both for V1 =10 and V1=12V.19 replies | 834 view(s)
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16th January 2020, 09:10Why not simply treat the signal as 18 bit signed? If your original ADC signal is 16 bit, you'll use 16 rather than 18 bit signed. Similarly, the...5 replies | 217 view(s)
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15th January 2020, 19:36Means that your scheme "start -> byte1-byte2-byte3-byte4-byte5-byte6-byte7-byte8-stop" is nonsense. Each UART byte involves a start and stop bit....10 replies | 436 view(s)
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15th January 2020, 17:58The circuit isn't particularly optimized for bipolar low-noise audio amps like NE5534, e.g. regarding resistor dimensioning. Thus a standard low...4 replies | 243 view(s)
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15th January 2020, 13:38Center tap indicates a specific inverter circuit, probably two transistor push-pull.7 replies | 450 view(s)
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15th January 2020, 12:22FvM replied to a thread Is there a way to sort threads by thread starting time? in About EDAboard.comThe method suggested by ads-ee works as described. Threads are sorted by thread starting time as you requested. Older threads with newer answer...5 replies | 342 view(s)
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15th January 2020, 12:10If S1 and S2 are parallel connected, the effective number of secondary turns is 7. You need to review the circuit schematic to verify that the...7 replies | 450 view(s)
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15th January 2020, 12:02FvM replied to a thread Intermediate Frequency for I and Q components in RF, Microwave, Antennas and OpticsYes. The software uses complex baseband signals with zero IF.1 replies | 174 view(s)
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15th January 2020, 00:01MC910 is a low frequency AC magnetic field sensor. Useless for car presence detection.11 replies | 3847 view(s)
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14th January 2020, 11:15FvM replied to a thread How do I connect / couple an oscillator to a bridge circuit in RF, Microwave, Antennas and OpticsBesides output impedance which might be sufficient, loaded large signal output swing is apparently insufficient. You need larger class A bias current...1 replies | 168 view(s)
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13th January 2020, 19:24It's the impedance seen with Av = 0 and Rout = 0.38 replies | 1303 view(s)
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13th January 2020, 15:21Zin(CL) formula is not correct, instead of R2, an effective resistance of R2 + RL||R1 must be put in.38 replies | 1303 view(s)
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13th January 2020, 15:00FvM replied to a thread ZYNQ 7Z030 LVDS IO - 910 Mbps and Ethernet in PLD, SPLD, GAL, CPLD, FPGA DesignThe package pinout has an explicit spec of available differential pairs. Difference between HP and HR is explained in datasheet, both support...3 replies | 208 view(s)
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