FvM
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Today, 08:34FvM replied to a thread Magnitude function analog circuit (square root of sum of two squares) in Analog Circuit DesignIn case of doubt, you'll implement the analog function blocks according to the given formula: squarer, sum, square root. In case you use single...3 replies | 165 view(s) -
Yesterday, 23:10FvM replied to a thread P mosfet turns on/voltage at drain during powerup in Elementary Electronic QuestionsThe cap also causes slow turn off. As the FET has initially zero Vds, the cap further causes the observed output pulse after switch closure because...5 replies | 231 view(s)
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Yesterday, 22:51Unsuitable high gate series resistors. Use 10 to 50 ohms for smooth turn-on.23 replies | 439 view(s)
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Yesterday, 16:36Arc I/V characteristic has negative slope (negative dynamic impedance), you won't achieve a stable arc with CV supply.17 replies | 422 view(s)
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21st August 2019, 22:49I don't see how you can achieve a stable segment current with the driver circuit. The driver ICs have relative large voltage drop, you would need a...5 replies | 224 view(s)
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21st August 2019, 22:31A single BJT amplifier has an offset drift of 2 mV/K, so it's surely inappropriate for a 60 mV shunt. Before discussing reasonable amplifier...7 replies | 267 view(s)
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21st August 2019, 18:04Vertical MOSFET, e.g. all power MOSFET have the substrate tied to source by design. Respectively there's always a "body diode" connected in parallel...1 replies | 102 view(s)
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21st August 2019, 10:57That's what I learnt as a student, but we see many halogen lamps with dimmer, in domestic as well as stage lighting. They seem to achieve a fair...15 replies | 442 view(s)
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21st August 2019, 08:48FvM replied to a thread [SOLVED] Stacking diodes for high voltage rectification in Elementary Electronic QuestionsAvalanche diodes are mostly used in HV diode stacks, e.g. the 8 kV/2.5A stack of Semikron. Avalanche capability means in this regard, that a diode...27 replies | 678 view(s)
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20th August 2019, 22:48FvM replied to a thread [SOLVED] Stacking diodes for high voltage rectification in Elementary Electronic QuestionsThe usual solution is to use diodes with avalanche characteristic that can be series connected without voltage sharing means.27 replies | 678 view(s)
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20th August 2019, 22:22It's apparently an EC (electrical conductivity) meter. EC is sometimes used as an estimation of TDS, but only valid for ionic compounds. The timer...3 replies | 226 view(s)
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19th August 2019, 13:46see this thread on PS-PL communication - https://forums.xilinx.com/t5/Embedded-Processor-System-Design/PS-PL-communication/td-p/847775 You might...6 replies | 227 view(s) -
19th August 2019, 10:24For PL to PS, you can also use the AXI i/f. The PS section can typically stay as the master and the PL section can stay as the AXI slave. The...6 replies | 227 view(s)
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19th August 2019, 09:52What is PL and PS? See forum rules, you shouldn't use6 replies | 227 view(s)
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19th August 2019, 08:22Regarding PWM scheme in post #19, it produces intended sine waveform only for resistive and under circumstances inductive load.22 replies | 915 view(s)
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19th August 2019, 08:12It really depends on the intended probe frequency range, which wasn't specified along this thread. The shown resistor divider primarily suffers from...26 replies | 670 view(s)
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18th August 2019, 22:56O.k., voltage and current are almost in phase now, apparently a DC offset of the Rokowski measurements is causing a ramp in the current display,...23 replies | 628 view(s)
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18th August 2019, 11:31With an estimated capacitance of 1 pF for the 100 Mohm resistor, you get a zero at 1600 Hz. A single 1 nF compensation capacitor can at least improve...23 replies | 628 view(s)
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18th August 2019, 10:41Is it a similar divider as in your other thread? If so, I doubt that the voltage waveform isn't reproduced correctly. Similarly, what kind of...23 replies | 628 view(s)
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18th August 2019, 08:07Rectifier output voltage is clamped to n*diode forward voltage, e.g. a few 10 V in your design.26 replies | 670 view(s)
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17th August 2019, 22:25It's not surprizing to see large ripple at the rectifier output. Negative voltage as shown is however not feasible. Most likely explanation is the...26 replies | 670 view(s)
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17th August 2019, 14:10You're simply confusing source and load impedances. Rain is the impedance of the source driving the ADC, minimal OP load impedance has nothing to do...7 replies | 286 view(s)
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17th August 2019, 13:55FvM replied to a thread Why does my homemade Yagi wifi antenna perform so poorly? in RF, Microwave, Antennas and OpticsYou are right, driving element impedance depends on the reflector and director spacing. I found this table in Balanis Antenna Theory. Numbers are for...18 replies | 740 view(s)
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16th August 2019, 22:35You can try to make the 12 V inductor large enough to provide continuous current at 2 W load. Coupled inductors can basically work, obviously the...17 replies | 542 view(s)
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16th August 2019, 22:30FvM replied to a thread Why does my homemade Yagi wifi antenna perform so poorly? in RF, Microwave, Antennas and OpticsThanks for mentioning the foam board. So it's actuality a folded dipole. Unfortunately it's seriously mismatched in this case, having typically 290...18 replies | 740 view(s)
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16th August 2019, 22:05How do you measure it? Sure that the probes don't affect the circuit? The question isn't clear at all.23 replies | 628 view(s)
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16th August 2019, 15:27Post the complete RTL. Are you properly doing the system clock input pin assignment in the xdc file?3 replies | 168 view(s)
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16th August 2019, 15:24dpaul replied to a thread Verilog code for 8 bit register with read/write in PLD, SPLD, GAL, CPLD, FPGA DesignI hope you realize that in order to have data from an axi slave to a 8 bit register, the 8 bit register must also have an axi wrapper. That axi...6 replies | 435 view(s)
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16th August 2019, 11:22The post body doesn't match the title. Where's the Verilog code?3 replies | 168 view(s)
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