FvM
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Today, 17:20Efficiency requirements and low load resistance have been introduced rather late to your thread. The present circuit seems to be operated outside the...85 replies | 2851 view(s) -
Today, 15:29Circuit load current wasn't yet specified. Even low Vcesat transistors (e.g. NXP "BISS" types) have Vcesat almost converging against a constant value...8 replies | 284 view(s)
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Today, 15:13Voltage sharing means may be necessary, depending on the application. The 100 ns delay skew assumed in the simulation is unrealistically large for...13 replies | 198 view(s)
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Today, 14:54To factor in only skin effect will underestimate the AC resistance, there's also proximity effect. Respectively, parallel connection of 4 wires will...1 replies | 53 view(s)
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Today, 14:41Unfortunately, MikroC libraries don't come with source code. You can at best look at assembly listings. Simple soft UART codes for other...8 replies | 213 view(s)
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Today, 14:32The energy loss happens due to low load resistance. Discharge time constant Rload*Cgenerator is in the same order of magnitude as the output rise...85 replies | 2851 view(s)
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Today, 14:07Emitter degeneration was also my guess, but in the present simulation, the effect of parasitic inductances is relatively small due to the moderate...13 replies | 198 view(s)
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Yesterday, 14:47FvM replied to a thread FERROCORE FR3 more information? in ASIC Design Methodologies and Tools (Digital)e.g. https://katalog.we-online.de/pbs/datasheet/74275143.pdf2 replies | 166 view(s)
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Yesterday, 12:46FvM replied to a thread FERROCORE FR3 more information? in ASIC Design Methodologies and Tools (Digital)Assume an inductive characteristic below 25 MHz. And review datasheets of major manufacturers that offer similar devices.2 replies | 166 view(s)
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Yesterday, 09:48A circuit oscillates if the Barkhausen criterion is fulfilled. In this case if the originally negative feedback turns into positive feedback due to...11 replies | 264 view(s)
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Yesterday, 09:37The symbol in post #1 is among the commonly understood PMOS symbols, see https://en.m.wikipedia.org/wiki/MOSFET#Circuit_symbols Please notice...11 replies | 264 view(s)
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21st July 2019, 22:09Not sure, at least several mV. To implement a BJT analog switch with zero offset voltage, operate the transistor inversely. Disadvantage is...8 replies | 284 view(s)
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21st July 2019, 12:03As a first step towards clarity, you can measure if the two VSS pins and center pad have low R connection. Connecting as many VSS pins as...3 replies | 177 view(s)
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21st July 2019, 11:54IRF510 has been discontinued by IRF/Infineon since many years but is still stocked at catalog distributors. I never saw an IRF510N type made by IRF....7 replies | 222 view(s)
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21st July 2019, 10:52No positive feedback. MOSFET in CS configuration is inverting the signal, thus overall negative feedback. Practical problem is gain in feedback path,...11 replies | 264 view(s)
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21st July 2019, 10:39Expect the positive half wave copied to Vout. No oscillator feature. Connecting a real OP brings up stability issues, apparently beyond your scope.11 replies | 264 view(s)
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21st July 2019, 10:05No useful question without specifying the OP parameters. Too many possible answers. What do you exactly mean with "oscillatory" in this context?11 replies | 264 view(s)
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21st July 2019, 09:57I forgot to mention that there may be also a save operation area problem when operating the small gates at 15 MHz with large C load. Multiple 74HC...6 replies | 196 view(s)
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21st July 2019, 09:45For correct shift register operation, the clock signal has to to fulfill the maximum rise/fall time requirements of HC logic family. A standard opto...24 replies | 954 view(s)
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21st July 2019, 09:29FvM replied to a thread ELECTRICAL AND ELECTRONICS Instrumentation in Elementary Electronic QuestionsSome explanation are unnecessarily complicated, I think. The keyword is orthogonality. Sine signals of different frequency (also freq=0, DC) are...24 replies | 720 view(s)
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21st July 2019, 08:25FvM replied to a thread What's the difference between stacked and cascode configurations? in Analog Integrated Circuit (IC) Design, Layout and FabricationNo. In the previous thread, it's just the other way round. Quite clearly, usual cascode configuration has the second (or possibly third) stage...5 replies | 217 view(s)
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21st July 2019, 08:05FvM replied to a thread [SOLVED] LM741 Amplifier not working with IR2110 IC [PROTUES] in PCB Routing Schematic Layout software and SimulationSomething between 95 and 99%. There's no big advantage of increasing it above 95%.6 replies | 368 view(s)
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20th July 2019, 23:55Single gate driver like LVC1G04 has about 10 ohms output impedance. Two in parallel should work. Or single LVC2G.6 replies | 196 view(s)
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20th July 2019, 22:22You forgot to tell the intended rise and fall time.6 replies | 196 view(s)
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20th July 2019, 15:36FvM replied to a thread RF Mosfet Class E PA for Dummies or absolute idiots in Analog Circuit DesignMOSFET Coss always decreases with rising Vds. - - - Updated - - - See this IXYS application note for 13.56 MHz class E PA....7 replies | 219 view(s)
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20th July 2019, 11:27I moved the thread to Analog Circuit Design section because it's only marginally related to microcontrollers. The wavelength of a DFB laser can...3 replies | 217 view(s)
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20th July 2019, 11:15FvM replied to a thread Hand soldering a 6x6mm QFN (28pin) in Hobby Circuits and Small Projects ProblemsAs already mentioned, the exposed pad should be connected to VSS. QFN ML package is relative large technology and can be easily reflow soldered...10 replies | 367 view(s)
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20th July 2019, 10:53FvM replied to a thread fully differential opamp' s output is not symmetrical in Analog Circuit DesignApparently an AC coupled test setup. Looks like normal operation.4 replies | 225 view(s)
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19th July 2019, 23:05It's generally no good idea to operate a peltier element with fixed voltage supply because for each combination of heat sink thermal resistance,...9 replies | 321 view(s)
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