FvM
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Yesterday, 21:38FvM replied to a thread Looking for a PSPICE/orCAD model of op amp LT1970 in Software Problems, Hints and ReviewsThe previous thread doesn't talk about simulating the device, may be real hardware problem. Linear/Analog is providing binary models for LTspice,...1 replies | 52 view(s) -
Yesterday, 16:30That's a possible explanation. Or shorted FRC output. Not sure if an ENC input signal outside specified frequency and level range may cause a similar...4 replies | 130 view(s)
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Yesterday, 16:27Yes. As the example shows, it can be also implemented with unity gain if the load resistance is infinite.11 replies | 895 view(s)
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Yesterday, 16:22Yes, that's true.10 replies | 924 view(s)
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Yesterday, 12:23FvM replied to a thread problem with my simulation on orcad pspice vers 9 in Elementary Electronic QuestionsAs the error message clearly says, there's a net list problem. You want to review the error log.1 replies | 127 view(s)
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Yesterday, 08:26FvM replied to a thread SCR speed brushed DC 180v motor control does not work in Analog Circuit DesignMissing connection between "GND" and SCR cathodes. Please notice that the control circuit GND, Arduino etc. carries mains voltage, with or without...10 replies | 323 view(s)
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Yesterday, 08:14You need to observe the voltage difference between each cathode and both heater terminals. The heater circuit sketched in post #1 would most likely...19 replies | 517 view(s)
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Yesterday, 08:03tf(,) is a time continuous transfer function, not a time discrete IIR.4 replies | 194 view(s)
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19th May 2019, 22:02FvM replied to a thread What do you call a ceramic SMD cap in a metal frame? in Elementary Electronic QuestionsThat's the idea. Better withstanding mechanical and thermal stress.4 replies | 340 view(s)
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19th May 2019, 21:59Yes, you want to read the data sheets. They have 200 V cathode to heater voltage limit.19 replies | 517 view(s)
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19th May 2019, 21:481 yes 2 no. There's no way to disable FRC separately.4 replies | 130 view(s)
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19th May 2019, 17:17My VHDL tool says it's -3, no reason to doubt about. Please review numeric_std.vhd how it's calculated. if XL(XL'LEFT)='1' then XNUM :=...10 replies | 924 view(s)
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19th May 2019, 08:46FvM replied to a thread Design and construction of scintillometer for evapotranspiration in MicrocontrollersNo. Water vapor NIR lines have about 10% absorption for 1 km atmospheric path according to literature. You can well detect it with a simple...18 replies | 1853 view(s)
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18th May 2019, 23:07FvM replied to a thread [moved] Convergenge issue PSpice- LM5022 in Software Problems, Hints and ReviewsIf the examples are working, it should be possible to move towards your circuit. I admit that SPICE convergence issues can be annoying and are...14 replies | 407 view(s)
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18th May 2019, 22:53Your implementation is different from links page 5 in two regards. - due to lack of a negative supply, the rectifier output for positive input isn't...11 replies | 895 view(s)
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18th May 2019, 18:00As far as I understand, the OP wants to implement MOD operation for power of two denominator. That's of course possible without a divider.10 replies | 924 view(s)
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18th May 2019, 17:57FvM replied to a thread [moved] Convergenge issue PSpice- LM5022 in Software Problems, Hints and ReviewsDid you try to run the PSPICE examples provided by TI along with the model?14 replies | 407 view(s)
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18th May 2019, 17:39Near. You calculate 1 MOD -4 = (1 MOD 4) - 4 = -3.10 replies | 924 view(s)
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18th May 2019, 15:12FvM replied to a thread Parallel connection of multiple half-bridge for high current motor applications in Power ElectronicsBootstrap driver has a number of limitations, particularly not providing 100 % duty cycle and requirement of a specific startup sequence. Can't you...22 replies | 2028 view(s)
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18th May 2019, 15:02FvM replied to a thread Generate random sequence of 1's and -1's in matlab in Elementary Electronic QuestionsBy nature of random distribution, an arbitrary selected sample can't have exactly zero mean otherwise it's not random. You may want to specify...5 replies | 652 view(s)
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18th May 2019, 13:41FvM replied to a thread hfss: copper spiral antenna modeling problem in Electromagnetic Design and SimulationNot clear what you want to achieve. What's the purpose of the double layer? Ground directly below the coil will create a short.9 replies | 1084 view(s)
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18th May 2019, 10:13I presume you are asking about precision rectifier. Come back with the schematic that doesn't work for you.11 replies | 895 view(s)
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18th May 2019, 09:52Presently, your question is missing any substantial specification (voltage, current, signal frequency, switching speed). Did you intentionally strip...4 replies | 351 view(s)
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18th May 2019, 09:48FvM replied to a thread Parallel connection of multiple half-bridge for high current motor applications in Power ElectronicsCree CAS300 modules are of course using multiple dies, like other high current MOSFET or IGBT modules. In contrast to parallel connection of...22 replies | 2028 view(s)
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18th May 2019, 08:50Presume you are asking about VHDL. You can review ieee.numeric_std library how mod and rem are evaluated. Both are finally referring to unsigned...10 replies | 924 view(s)
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17th May 2019, 16:18FvM replied to a thread Design and construction of scintillometer for evapotranspiration in MicrocontrollersLIDAR is an umbrella term for instruments with quite different purpose and operation details. You have simple laser distance sensors, scanning...18 replies | 1853 view(s)
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17th May 2019, 15:55FvM replied to a thread Phase and frequency locking multiple (9 units) LLC drivers that are each 10cm apart in Power ElectronicsThe synchronous rectifiers are acting as full wave rectifiers and sourcing DC current. The pulsating current output of both LLC has ripple with...15 replies | 414 view(s)
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17th May 2019, 15:41FvM replied to a thread Parallel connection of multiple half-bridge for high current motor applications in Power ElectronicsIn typical switching applications, source inductance is the limiting factor for switching speed and will almost perfectly balance the current rise...22 replies | 2028 view(s)
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17th May 2019, 13:52FvM replied to a thread Vivado Taking A Long Time To Run Synthesis & Implementation in PLD, SPLD, GAL, CPLD, FPGA DesignSounds like a poorly designed (e.g. pure combinational) sha implementation which hardly meets timing.3 replies | 134 view(s)
About FvM
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