FvM
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Yesterday, 17:14I presume it's a Proteus simulator error message? Check if xlcd.h is configured for 4-bit mode (the default). If this is the case, there may a...1 replies | 121 view(s) -
Yesterday, 16:32FvM replied to a thread [SOLVED] Mains leaking currents causing problems in my house in Elementary Electronic QuestionsWhat devices are you talking about? Appliances with two pin connector are designed with safe insulation. If they involve metal cases or parts, the...58 replies | 3974 view(s)
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Yesterday, 15:55FvM replied to a thread Doubt in the concept of 3 phase thyristor based full wave fully controlled rectifier in Power ElectronicsNot sure if the thyristors in your schematic are real semiconductor devices or virtual switches with a logic input. In the former case, the trigger...3 replies | 96 view(s)
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Yesterday, 15:38FvM replied to a thread "RS-232 port to transfer data to PC for analysis" in Software Problems, Hints and ReviewsThe emphasis is on implementing, not the meaning of CRC. How should it be implemented in the bridge device which is just transporting UART...11 replies | 418 view(s)
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Yesterday, 15:31The table is only giving examples for certain crystal frequencies, for other frequencies use the given formula. 16 MHz is one of the "standard"...5 replies | 144 view(s)
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Yesterday, 14:42FvM replied to a thread Low and high impedance of low pass stepped impedance filter in RF, Microwave, Antennas and OpticsThe low and high microstrip impedances can be chosen arbitrarily within certain useful limits. In the first place, substrate properties and feasible...2 replies | 132 view(s)
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Yesterday, 13:42FvM replied to a thread TVS Diodes power ratings for IEC 61000-4-5 in Professional Hardware and Electronics DesignAccording to my reading of the standard, power lines have to be tested with 1.2/50 µs (8/20 µs short circuit) pulses. You should choose TVS diodes...3 replies | 147 view(s)
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Yesterday, 13:03Please review the datasheet, particularly chapter 10.1 USART Baud Rate Generator. You'll see that it's not feasible with standard crystal...5 replies | 144 view(s)
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Yesterday, 12:49FvM replied to a thread "RS-232 port to transfer data to PC for analysis" in Software Problems, Hints and ReviewsMCP2221 is a hardware USB CDC/HID bridge, it doesn't involve a microcontroller core. As for the UART functionality, it's similar to popular...11 replies | 418 view(s)
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Yesterday, 11:38FvM replied to a thread How to generate sine wave using Verilog? in ASIC Design Methodologies and Tools (Digital)Use the most significant (= sign) bit.9 replies | 483 view(s)
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Yesterday, 11:33FvM replied to a thread Mains harmonic emissions for dimmable offline LED drivers. in Power ElectronicsThey may e newer or more specific test specifications for dimmable LED lamps. The best fitting specification in IEC 61000-2-3:2009 says under C.5.3...7 replies | 176 view(s)
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15th November 2019, 23:59FvM replied to a thread TVS Diodes power ratings for IEC 61000-4-5 in Professional Hardware and Electronics DesignYou should clarify which of the 61000-4-5 test pulses has to be handled by the protection circuit, also what's the intended TVS voltage. TVS ratings...3 replies | 147 view(s)
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15th November 2019, 09:54dpaul replied to a thread Using a BFM in system verification code. in ASIC Design Methodologies and Tools (Digital)It should be possible to instantiate the BFM in your master testbench. The syswip IP should have some doc on that. Years ago I used the syswip...2 replies | 125 view(s) -
14th November 2019, 17:05FvM replied to a thread Trying to understand mismatched antenna behaviour above 20GHz without equipment. in RF, Microwave, Antennas and OpticsLooks like standing waves of a 1.5 ns (about 30 cm) transmission line.2 replies | 159 view(s)
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14th November 2019, 10:09Why? They are copying the complete EPCS content to the *.jic file.21 replies | 1356 view(s)
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14th November 2019, 09:37FvM replied to a thread Differential amplifier measure -32V to +32V with single 3.V supply in Analog Circuit DesignThe asymmetrical input structure implies unequal input impedance. I prefer a true instrumentation amplifier (either 2 or 3 OP design) for...7 replies | 172 view(s)
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13th November 2019, 23:13FvM replied to a thread [SOLVED] Ohm's Law and Power calculation problem in Elementary Electronic QuestionsI gave some hints why the current waveform is likely to be distorted by the characteristic of the transducer. There may be more problems with your...30 replies | 1172 view(s)
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13th November 2019, 15:45FvM replied to a thread PCB design 450 MHz LVDS trace routing in PCB Routing Schematic Layout software and Simulation50r SE means zero coupling (infinite separation) of differential lines, that's rather impractical. A typical common mode impedance of the...8 replies | 572 view(s)
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13th November 2019, 15:11Using high frequent PWM (quasi continuous variation of the 50 Hz voltage) eliminates 50 Hz harmonics but adds pwm frequent (fundamental + harmonics)...4 replies | 221 view(s)
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13th November 2019, 12:26FvM replied to a thread Data Transfer over long rwisted pair cable in PLD, SPLD, GAL, CPLD, FPGA DesignAs far as I see, BroadR isn't suited for the intended cable length. This chip spec is referring to 15 m UTP....15 replies | 897 view(s)
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13th November 2019, 11:25GTO switching at MHz? Oops! That's completely unrealistic. Even very fast switches like SiC MOSFET won't be used in this range. 150 kHz to 2 MHz...4 replies | 221 view(s)
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13th November 2019, 11:16FvM replied to a thread [SOLVED] Ohm's Law and Power calculation problem in Elementary Electronic QuestionsThe calculations and respective conclusions are presuming correct I and U measurements. Particularly the current measurement is very implausible,...30 replies | 1172 view(s)
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13th November 2019, 10:14dpaul replied to a thread Data Transfer over long rwisted pair cable in PLD, SPLD, GAL, CPLD, FPGA DesignYou might consider BroadR-Reach Ethernet. It is transmission of data using Ethernet protocol using twisted pair cable. The physical layer has been...15 replies | 897 view(s)
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13th November 2019, 09:08FvM replied to a thread sampling rate vs rate of change of input for control system in Analog Circuit DesignAgain, you are not understanding the concepts of time discrete signal processing. Required sample rate depends on signal bandwidth, not magnitude...11 replies | 328 view(s)
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12th November 2019, 22:50Did you sketch the circuit right? As drawn, Cdom is no Miller capacitor. Q5 should be npn.3 replies | 163 view(s)
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12th November 2019, 22:42FvM replied to a thread Class AB fully differential amplifier design issue in Analog Integrated Circuit (IC) Design, Layout and FabricationThis looks like a poor FD design. How does it achieve common mode control?3 replies | 213 view(s)
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12th November 2019, 16:52Current mirror need monolithic transistor pairs to achieve reasonable matching. The emitter degeneration resistors are a possible means to get a kind...3 replies | 172 view(s)
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12th November 2019, 13:32Basically yes. Generated field strength of simple coil configurations (single turn, multi turn spiral) can be calculated based on elementary physical...11 replies | 365 view(s)
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12th November 2019, 13:27FvM replied to a thread sampling rate vs rate of change of input for control system in Analog Circuit DesignThe idea behind your examples seems to be that the sampled data should look the same as time continuous data. That's not the way time discrete...11 replies | 328 view(s)
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