FvM
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Today, 10:06May be. You would want to correct the dot marking in schematic. The numbers in post #1 suggest about 0.4 mm air gap, should be O.K. It's...12 replies | 245 view(s) -
Today, 09:56FvM replied to a thread Considering the power amplifier for complex modulate signal in Digital communicationCrest factor of different QAM signals can be easily found in literature, just ask Google. It's 4.23 dB for 256QAM, means you need at least 2.7 W...3 replies | 831 view(s)
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Yesterday, 23:01The transformer circuit according to the dot symbols is forward instead of flyback.12 replies | 245 view(s)
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Yesterday, 16:32FvM replied to a thread Looking for an non-invasive sensor for a fitness machine in Hobby Circuits and Small Projects ProblemsNo electricity, no motor. A flywheel, probably with an eddy current brake to absorb power. The "non-invasive" point is setting some restrictions,...4 replies | 248 view(s)
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Yesterday, 14:21So you must investigate the slave IP side. Questions to be asked for investigation: Is there valid data for the slave address you are reading?...117 replies | 5015 view(s) -
Yesterday, 10:22FvM replied to a thread Help needed; Check of PCB and some other questions in Hobby Circuits and Small Projects ProblemsMost sensitive net is open drain sensor output with 30 k internal pull-up. Should possibly use additional external pull-up. Power traces are...12 replies | 547 view(s)
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Yesterday, 10:09There's no relevant RC time constant in your circuit. Why don't you simply refer to the start-up waveform in TPS56220 datasheet? Optionally PSpice...2 replies | 169 view(s)
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26th March 2020, 22:44Possibly... But the OP is using vivado 19. which makes default use of xsim compiler. The OP was not specific about the compiler used.10 replies | 360 view(s)
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26th March 2020, 14:53Please post the error msg you get.10 replies | 360 view(s)
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26th March 2020, 11:22FvM replied to a thread Help needed; Check of PCB and some other questions in Hobby Circuits and Small Projects ProblemsTo assess cross talk and voltage drop, we need to refer to the presently unknown circuit to estimate voltages, currents and net suceptibility. ...12 replies | 547 view(s)
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26th March 2020, 11:09Show the circuit schematic.6 replies | 219 view(s)
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25th March 2020, 16:29The resistance curve seems to show a 5k NTC. To calculate the translation to voltage and ADC value, you need to know the circuit, apparently a...9 replies | 413 view(s)
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25th March 2020, 16:17Averaging instantaneous signal magnitude as described under 1) would work if the magnitude is constant (CW or FM signal). It doesn't work for a...6 replies | 463 view(s)
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25th March 2020, 14:07FvM replied to a thread Where to get schematics about SCRs full-wave triggering circuits ? in Power ElectronicsThe trigger voltage has to be applied between gate and cathode. R5 causes a negative gate voltage, in a real circuit it might cause damage of the SCR...43 replies | 1507 view(s)
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25th March 2020, 09:33FvM replied to a thread [SOLVED] 128 x 32 single port RAM VHDL code problem in PLD, SPLD, GAL, CPLD, FPGA DesignThe other point in post #2 is nevertheless true. We don't see which part of the wave is incorrect, we don't even know which part of the code has been...6 replies | 291 view(s)
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24th March 2020, 22:57FvM replied to a thread [SOLVED] 128 x 32 single port RAM VHDL code problem in PLD, SPLD, GAL, CPLD, FPGA DesignThe code looks like a template to infer FPGA block RAM. In so far it's well synthesizable.6 replies | 291 view(s)
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24th March 2020, 14:24FvM replied to a thread SMA-Microstrip transition removal for large-signal measurement of PA in RF, Microwave, Antennas and OpticsLooks like four cold solder joints...26 replies | 1175 view(s)
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24th March 2020, 14:18FvM replied to a thread [SOLVED] Adding '1' to a std_logic_vector in VHDL in PLD, SPLD, GAL, CPLD, FPGA DesignRCO is evaluating P input but should evaluate temp respectively Q.7 replies | 383 view(s)
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24th March 2020, 12:39The compiler assigns unique hierarchical names for unnamed generates, review LRM 27.6.3 replies | 261 view(s)
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24th March 2020, 10:25FvM replied to a thread Differential comparator with reference comparison voltage level in Analog Integrated Circuit (IC) Design, Layout and FabricationI have presently no access to IEEE, thus I can't review the paper. Basically it's a simple function: comp = sign(Voutp-Voutm-Vr) I can imagine...5 replies | 381 view(s)
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24th March 2020, 08:40FvM replied to a thread [SOLVED] Effect of LC filter in simulation of BTL H-Bridge inverter? in Power ElectronicsIt's not the same PWM scheme. It's using the same kind of signal generation, but is driving the switches differently. S2 e.g. should to be driven...12 replies | 456 view(s)
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23rd March 2020, 23:31FvM replied to a thread SMA-Microstrip transition removal for large-signal measurement of PA in RF, Microwave, Antennas and OpticsA correctly mounted SMA PCB edge connector isn't that bad. The presented photos however show an excessive gap and the second PCB in post #14 has a...26 replies | 1175 view(s)
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23rd March 2020, 23:11FvM replied to a thread [SOLVED] Effect of LC filter in simulation of BTL H-Bridge inverter? in Power ElectronicsIt's an unsuitable PWM pattern, driving only first and third output quadrant. To drive reactive loads with sine waveform, both half bridges must...12 replies | 456 view(s)
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23rd March 2020, 14:55FvM replied to a thread Need Solution for voltage divider bias with two source in Professional Hardware and Electronics DesignIs it 3 mohm or 3 Mohm?4 replies | 394 view(s)
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23rd March 2020, 12:33Back to the question. That's my understanding of the discussed circuit: 60 kV voltage source, internal resistance limiting the current to maximal...18 replies | 627 view(s)
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23rd March 2020, 12:13FvM replied to a thread kick-back on the diode voltage current mirror in Analog Integrated Circuit (IC) Design, Layout and Fabrication"Enable it" means turning on the current source into the current mirror or what? Where do you see a "kick back"?3 replies | 336 view(s)
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23rd March 2020, 08:43Why not read the datasheet before posting? The transistor is designed to be mounted directly on a heatsink as shown above. The cutout is also...1 replies | 80 view(s)
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23rd March 2020, 08:27Presume you clarified that it's not a solder short. The failure is most likely caused by a massive VDD overvoltage or by overloading a specific...6 replies | 352 view(s)
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22nd March 2020, 23:36Haven't read a confused thread like this since long. Post #1 says "multimeter" whichout specifying a range. Post #3 states it's operated in...18 replies | 627 view(s)
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