FvM
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Today, 00:06The code should work, but measuring peak-to-peak current magnitude is sensitive to waveform distortions and noise and in so far the least accurate...8 replies | 112 view(s) -
Yesterday, 17:40ADE7878 is not recommended for new designs, ADE7878A ist the recent type. I agree with KlausST. You need a poly phase energy meter IC to support...8 replies | 201 view(s)
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Yesterday, 17:21If isolation required, LLC converter, otherwise multiphase synchronous boost.2 replies | 101 view(s)
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Yesterday, 13:31FvM replied to a thread Resonant Converter Simulation Problem in Hobby Circuits and Small Projects ProblemsMake the total load impedance inductive to achieve zero voltage switching and reduce switching losses. General consideration about LLC operation...6 replies | 176 view(s)
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Yesterday, 13:28FvM replied to a thread How to Measure Creepage Distance in PCB Routing Schematic Layout software and Simulationpin-to-pin seems pretty easy, use a ruler or measure in 3D-model Find some consideration about heatsink creepage in Infineon AN2012-10...3 replies | 91 view(s)
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Yesterday, 12:58FvM replied to a thread How to Measure Creepage Distance in PCB Routing Schematic Layout software and SimulationThere are several creepage paths involved with TO220, e.g. pin-to-pin, at the case and at the PCB, heatsink to tab, etc. Can you ask more specific?3 replies | 91 view(s)
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Yesterday, 12:52FvM replied to a thread Resonant Converter Simulation Problem in Hobby Circuits and Small Projects ProblemsI think you are mixing several topics. - An induction heater may use a parallel capacitor to compensate the low coil inductance (air coil or coil...6 replies | 176 view(s)
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Yesterday, 12:30Not when represented with long data type as in post #12.16 replies | 691 view(s)
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Yesterday, 12:23FvM replied to a thread Design a system clock monitor in verilog in PLD, SPLD, GAL, CPLD, FPGA DesignYes, using an auxiliary clock, e.g. built-in FPGA RC oscillator. Usually a clock monitor makes only sense if you have second clock you can switch...3 replies | 163 view(s)
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Yesterday, 09:32b=65535 is outside Q1.15 (int16) range. Should be -1.16 replies | 691 view(s)
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Yesterday, 09:28FvM replied to a thread Resonant Converter Simulation Problem in Hobby Circuits and Small Projects ProblemsHow do you determine resonant frequency? Resonant converter can be hard switching series resonant LC converter or better soft switching LLC...6 replies | 176 view(s)
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Yesterday, 09:22Apparently you don't scale the multiply result correctly.16 replies | 691 view(s)
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Yesterday, 00:22FvM replied to a thread Switch +/- 15v supply for audio preamp in Hobby Circuits and Small Projects ProblemsDo you need isolation between SPI and supply switches? If not, there are simpler solutions than optoMOS.6 replies | 305 view(s)
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Yesterday, 00:05FvM replied to a thread $freq while using AC analysis to access lookup table in Analog Circuit DesignForgot to mention the circuit analysis tool.5 replies | 277 view(s)
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Yesterday, 00:00The circuit is rather unclear because you are showing less than half of the DC/DC pins. Each converter has two input and three output pins.4 replies | 208 view(s)
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19th November 2019, 19:45See below an example of plotting transistor capacitances over Vds in Ltspice.7 replies | 258 view(s)
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19th November 2019, 13:25Im under the impression, you are trying to drag on the thread without ever looking into the 18F2550 datasheet… Simply notice that the PLL has...4 replies | 255 view(s)
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19th November 2019, 13:18Please some more snippets of specification. Waveform, rise-/falltime, pulse width, magnitude, just to mention a few parameters.7 replies | 276 view(s)
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19th November 2019, 13:13FvM replied to a thread Multiple pulse width ( 5 pulses ) inverter and lowest low order harmonics in Mathematics and PhysicsYes, exactly.17 replies | 610 view(s)
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19th November 2019, 10:18RF should be ok then.12 replies | 584 view(s)
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19th November 2019, 10:13FvM replied to a thread Difference circuit not acting as expected in Analog Integrated Circuit (IC) Design, Layout and FabricationLooks like single supply OP in saturation.3 replies | 151 view(s)
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19th November 2019, 09:25FvM replied to a thread Multiple pulse width ( 5 pulses ) inverter and lowest low order harmonics in Mathematics and PhysicsSorry for lack of clarity. r1,f1 etc. are the edge times (rising 1, falling 1,...) in rad. To get the full picture, you should review the original...17 replies | 610 view(s)
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18th November 2019, 23:58FvM replied to a thread Multiple pulse width ( 5 pulses ) inverter and lowest low order harmonics in Mathematics and PhysicsThe emphasis of the presented results is on the feasibility of harmonic cancellation over a certain magnitude range. I'm assuming that this solution,...17 replies | 610 view(s)
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18th November 2019, 19:13Crystal oscillator output has DC bias of Vcc/2, RF in bias is unknown. Where is it connected to? Use capacitor to clock oscillator DC bias. It's...12 replies | 584 view(s)
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18th November 2019, 17:26For correct double balanced mixer operation (e.g. achieving the specified LO to IF isolation), RF and LO inputs must be DC free. According to your...12 replies | 584 view(s)
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18th November 2019, 16:24dpaul replied to a thread Using a BFM in system verification code. in ASIC Design Methodologies and Tools (Digital)Did you consult the *_user_manual.pdf that comes with the download? You have written the master module, so you need to use the BFM as a slave. ...6 replies | 329 view(s) -
18th November 2019, 15:56Can't comment unknown measurements.16 replies | 413 view(s)
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18th November 2019, 12:26FvM replied to a thread asynchronous D Flip flop with negative edge triggered clk,set and reset in ASIC Design Methodologies and Tools (Digital)Can you please clarify which hardware should be represented by the equation? I'm not able to read a physical sense into it.2 replies | 170 view(s)
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18th November 2019, 12:22FvM replied to a thread Transformer Phase shift used in isolated zero crossing detectors in Power ElectronicsA voltage measuring transformer with specified accuracy class will show lower phase error, but be much more bulky. See...4 replies | 174 view(s)
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18th November 2019, 12:14FvM replied to a thread Multiple pulse width ( 5 pulses ) inverter and lowest low order harmonics in Mathematics and PhysicsI get the below shown edge timing for cancellation of 3/5/7/9th harmonic. Time scale is rad. Magnitudes without the 4a/pi factor. I have set an...17 replies | 610 view(s)
About FvM
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