FvM
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Today, 22:48FvM replied to a thread Stacking diodes for high voltage rectification in Elementary Electronic QuestionsThe usual solution is to use diodes with avalanche characteristic that can be series connected without voltage sharing means.18 replies | 314 view(s) -
Today, 22:22It's apparently an EC (electrical conductivity) meter. EC is sometimes used as an estimation of TDS, but only valid for ionic compounds. The timer...2 replies | 48 view(s)
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Yesterday, 13:46see this thread on PS-PL communication - https://forums.xilinx.com/t5/Embedded-Processor-System-Design/PS-PL-communication/td-p/847775 You might...6 replies | 182 view(s) -
Yesterday, 10:24For PL to PS, you can also use the AXI i/f. The PS section can typically stay as the master and the PL section can stay as the AXI slave. The...6 replies | 182 view(s)
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Yesterday, 09:52What is PL and PS? See forum rules, you shouldn't use6 replies | 182 view(s)
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Yesterday, 08:22Regarding PWM scheme in post #19, it produces intended sine waveform only for resistive and under circumstances inductive load.22 replies | 832 view(s)
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Yesterday, 08:12It really depends on the intended probe frequency range, which wasn't specified along this thread. The shown resistor divider primarily suffers from...26 replies | 550 view(s)
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18th August 2019, 22:56O.k., voltage and current are almost in phase now, apparently a DC offset of the Rokowski measurements is causing a ramp in the current display,...23 replies | 543 view(s)
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18th August 2019, 11:31With an estimated capacitance of 1 pF for the 100 Mohm resistor, you get a zero at 1600 Hz. A single 1 nF compensation capacitor can at least improve...23 replies | 543 view(s)
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18th August 2019, 10:41Is it a similar divider as in your other thread? If so, I doubt that the voltage waveform isn't reproduced correctly. Similarly, what kind of...23 replies | 543 view(s)
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18th August 2019, 08:07Rectifier output voltage is clamped to n*diode forward voltage, e.g. a few 10 V in your design.26 replies | 550 view(s)
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17th August 2019, 22:25It's not surprizing to see large ripple at the rectifier output. Negative voltage as shown is however not feasible. Most likely explanation is the...26 replies | 550 view(s)
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17th August 2019, 14:10You're simply confusing source and load impedances. Rain is the impedance of the source driving the ADC, minimal OP load impedance has nothing to do...7 replies | 260 view(s)
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17th August 2019, 13:55FvM replied to a thread Why does my homemade Yagi wifi antenna perform so poorly? in RF, Microwave, Antennas and OpticsYou are right, driving element impedance depends on the reflector and director spacing. I found this table in Balanis Antenna Theory. Numbers are for...17 replies | 634 view(s)
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16th August 2019, 22:35You can try to make the 12 V inductor large enough to provide continuous current at 2 W load. Coupled inductors can basically work, obviously the...16 replies | 451 view(s)
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16th August 2019, 22:30FvM replied to a thread Why does my homemade Yagi wifi antenna perform so poorly? in RF, Microwave, Antennas and OpticsThanks for mentioning the foam board. So it's actuality a folded dipole. Unfortunately it's seriously mismatched in this case, having typically 290...17 replies | 634 view(s)
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16th August 2019, 22:05How do you measure it? Sure that the probes don't affect the circuit? The question isn't clear at all.23 replies | 543 view(s)
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16th August 2019, 15:27Post the complete RTL. Are you properly doing the system clock input pin assignment in the xdc file?3 replies | 144 view(s)
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16th August 2019, 15:24dpaul replied to a thread Verilog code for 8 bit register with read/write in PLD, SPLD, GAL, CPLD, FPGA DesignI hope you realize that in order to have data from an axi slave to a 8 bit register, the 8 bit register must also have an axi wrapper. That axi...6 replies | 400 view(s)
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16th August 2019, 11:22The post body doesn't match the title. Where's the Verilog code?3 replies | 144 view(s)
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16th August 2019, 11:13FvM replied to a thread Why does my homemade Yagi wifi antenna perform so poorly? in RF, Microwave, Antennas and OpticsAs shown in the picture, it's a straight 60 to 75 ohm half wave dipole, not a folded dipole. This makes sense because it's roughly matched to the 50...17 replies | 634 view(s)
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16th August 2019, 10:58Apart from possible ringing and overshoot, a forward converter shows only tracking outputs if both inductors are in continuous conducting mode (CCM)....16 replies | 451 view(s)
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15th August 2019, 12:26FvM replied to a thread [SOLVED] magnet wire parasitic properties in Elementary Electronic QuestionsSelf capacitance in the Snelling book means inter turn capacitance.5 replies | 238 view(s)
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15th August 2019, 10:01If it's isolated RS-485, e.g. PROFIBUS network, it doesn't necessarily use ground connection. Star connection through "junctions box" is only...4 replies | 176 view(s)
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15th August 2019, 09:51FvM replied to a thread [SOLVED] magnet wire parasitic properties in Elementary Electronic QuestionsSnelling, Soft Ferrites, paragraph 11.6 The Self Capacitance of a Winding does detail calculations of different winding configurations. The 1969...5 replies | 238 view(s)
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15th August 2019, 08:05For Xilinx FPGAs containing ARM core/s I can recommend you to start with the this free to download eBook: http://www.zynqbook.com/ Many of the...2 replies | 186 view(s)
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14th August 2019, 22:37FvM replied to a thread 1 minute vs 1 second isolation voltage test for isolated offline SMPS transformer in Power ElectronicsYou have previously written that the power supply is classified as basic insulation. Then the test is surely not performed with 3750 VAC. EN 61558 is...17 replies | 739 view(s)
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14th August 2019, 15:51I would never use stuff as create_wave or try to force a toggle behavior in order to generate a fundamental signal such as clock. For signals such...10 replies | 396 view(s)
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