Hello all,
I am working on flipchip for our new design (GF22nmFDSOI technology). its a pad limited design, That is the reason why we want to go for flip chip instead of wirebond to reduce die size. So can anyone suggest me on the package I should use , Can we use CPGA packaging for flip chip? or...
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I am working on flipchip for our new design (GF22nmFDSOI technology). its a pad limited design, That is the reason why we want to go for flip chip instead of wirebond to reduce die size. So can anyone suggest me on the package I should use , Can we use CPGA packaging for flip chip? or...