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Threads 15001 to 15030 of 22197

Forum: PLD, SPLD, GAL, CPLD, FPGA Design

Simple and Complex Programmable Logic Devices from Altera, Cypress, Xilinx. Field Programmable Gate Array. Device specific VHDL/Verilog/SystemC questions.

    • Replies: 3
    • Views: 1,475
    18th June 2008, 03:15 Go to last post
  1. Closed: FPGA High Performance Board

    Started by ehsan_iut, 20th April 2008 05:50
    • Replies: 2
    • Views: 1,078
    18th June 2008, 02:20 Go to last post
  2. Closed: Quartus II web edition lemitations

    Started by alzomor, 16th June 2008 04:18
    • Replies: 1
    • Views: 933
    17th June 2008, 14:53 Go to last post
  3. Closed: Need help regarding bmm file

    Started by babaganoosh, 17th June 2008 14:28
    • Replies: 0
    • Views: 779
    17th June 2008, 14:28 Go to last post
  4. Closed: I need a XILINX Spartan3 XC3S400-FT256 ORCAD CAPTURE Symbol

    Started by h_humble2001, 14th March 2008 11:01
    • Replies: 9
    • Views: 6,560
    17th June 2008, 13:28 Go to last post
  5. Closed: Problem with declaring inout port in code

    Started by Ravindranit, 15th June 2008 06:54
    • Replies: 4
    • Views: 1,190
    17th June 2008, 11:56 Go to last post
  6. Closed: help needed for type conversion in QUARTUS 2

    Started by childs, 12th June 2008 09:51
    • Replies: 4
    • Views: 861
    17th June 2008, 10:31 Go to last post
  7. Closed: Altium Designer NB2DSK01

    Started by Johnson, 7th June 2008 13:39
    • Replies: 11
    • Views: 2,485
    16th June 2008, 23:00 Go to last post
  8. Closed: How can get High speed ECL serial data with a xilinx fpga

    Started by koraei, 12th June 2008 22:04
    • Replies: 4
    • Views: 2,062
    16th June 2008, 20:20 Go to last post
  9. Closed: How to learn interfacing memory storage device?

    Started by sridharjubliant, 13th June 2008 13:28
    • Replies: 1
    • Views: 855
    16th June 2008, 04:17 Go to last post
  10. Closed: Spartan-3E500 regarding IO ports

    Started by a.wagih, 15th June 2008 15:47
    • Replies: 0
    • Views: 760
    15th June 2008, 15:47 Go to last post
  11. Closed: about niosⅡ

    Started by higildedzest, 13th June 2008 01:58
    • Replies: 4
    • Views: 782
    15th June 2008, 14:25 Go to last post
  12. Closed: How to run Synplify from the linux command line ?

    Started by omara007, 15th June 2008 12:52
    • Replies: 0
    • Views: 2,197
    15th June 2008, 12:52 Go to last post
  13. Closed: Generic JTAG cable for old Memec development board

    Started by lomtik, 11th May 2008 22:43
    • Replies: 9
    • Views: 5,495
    13th June 2008, 22:54 Go to last post
  14. Closed: VHDL code for ones counter

    Started by ahsanali, 8th June 2008 04:44
    • Replies: 4
    • Views: 11,929
    13th June 2008, 14:34 Go to last post
  15. Closed: validation of AES core

    Started by kzirshan, 11th June 2008 11:00
    • Replies: 1
    • Views: 767
    13th June 2008, 14:06 Go to last post
  16. Closed: Regardin clock divider virtex 2 pro xcv30

    Started by arunjatti, 12th June 2008 21:00
    • Replies: 1
    • Views: 837
    12th June 2008, 21:36 Go to last post
  17. Closed: How Can I connect between 2 FPGAs ??

    Started by missbirdie, 12th June 2008 19:16
    • Replies: 0
    • Views: 617
    12th June 2008, 19:16 Go to last post
  18. Closed: DDR SDRAM with MicroBlaze

    Started by ezzeldeen, 10th June 2008 10:51
    • Replies: 1
    • Views: 1,472
    12th June 2008, 19:08 Go to last post
  19. Closed: VHDL Hard Syntax (question about a string)

    Started by kungfu007, 12th June 2008 13:49
    • Replies: 1
    • Views: 756
    12th June 2008, 14:54 Go to last post
  20. Closed: i found fmf lib act8980(new in 2007)

    Started by jflbr, 7th June 2008 02:26
    • Replies: 2
    • Views: 940
    12th June 2008, 14:46 Go to last post
  21. Closed: what is the best FPGA Place & Route Tool

    Started by elec-eng, 11th June 2008 18:52
    • Replies: 1
    • Views: 926
    12th June 2008, 06:55 Go to last post
  22. Closed: asic prototyping using FPGA

    Started by muhammad_ali, 9th June 2008 12:51
    • Replies: 2
    • Views: 895
    12th June 2008, 06:29 Go to last post
  23. Closed: Need Help in Parallel to Serial VHDL module

    Started by missbirdie, 10th June 2008 22:47
    • Replies: 3
    • Views: 8,307
    11th June 2008, 18:40 Go to last post
  24. Closed: What tools support "C" to program FPGA

    Started by vishwa, 3rd June 2008 11:27
    • Replies: 9
    • Views: 1,286
    11th June 2008, 16:28 Go to last post
  25. Closed: I want create component using package at VHDL

    Started by Kuzmi4, 11th June 2008 12:31
    • Replies: 0
    • Views: 1,410
    11th June 2008, 12:31 Go to last post
  26. Closed: ISE 9.2i VHDL editor problem.

    Started by kostbill, 7th June 2008 23:51
    • Replies: 5
    • Views: 1,010
    11th June 2008, 07:26 Go to last post
  27. Closed: USB interfacing with Xilinx XSA50 FPGA Board

    Started by Achut Giree, 10th June 2008 12:25
    • Replies: 1
    • Views: 1,274
    10th June 2008, 20:49 Go to last post
  28. Closed: I2C data transfer Question

    Started by vishwa, 10th June 2008 06:56
    • Replies: 2
    • Views: 825
    10th June 2008, 19:56 Go to last post