1. Announcement:
    Forum rules & policies (quick reference)
    alexan_e (Administrator)
    7th August 2014
    Views:
    105,901
Page 3 of 740 FirstFirst 1 2 3 4 5 13 53 103 503 ... LastLast
Threads 61 to 90 of 22197

Forum: PLD, SPLD, GAL, CPLD, FPGA Design

Simple and Complex Programmable Logic Devices from Altera, Cypress, Xilinx. Field Programmable Gate Array. Device specific VHDL/Verilog/SystemC questions.

  1. Shift register bitwidth issue

    Started by promach, 13th March 2018 04:15
    • Replies: 6
    • Views: 633
    15th March 2018, 13:55 Go to last post
    • Replies: 6
    • Views: 537
    15th March 2018, 11:20 Go to last post
    • Replies: 5
    • Views: 474
    15th March 2018, 10:01 Go to last post
  2. [SOLVED] Tracking states of FSM (finite state machine) in Modelsim

    Started by mjuneja, 13th February 2018 10:57
    • Replies: 17
    • Views: 1,549
    15th March 2018, 07:36 Go to last post
  3. VHDL Multiplying by a fraction

    Started by Sofus, 13th March 2018 16:25
    • Replies: 4
    • Views: 442
    13th March 2018, 21:58 Go to last post
  4. What's going on behind FPGA-based Clouds?

    Started by Mohammad Amin Nili, 12th March 2018 13:25
    • Replies: 5
    • Views: 611
    13th March 2018, 21:38 Go to last post
  5. GLS (Timing Simulation) Issue

    Started by varthurravi, 13th March 2018 16:02
    • Replies: 1
    • Views: 238
    13th March 2018, 16:43 Go to last post
  6. A simple question on testbench stimulus

    Started by promach, 7th March 2018 05:12
    • Replies: 16
    • Views: 876
    12th March 2018, 15:04 Go to last post
  7. one clocked process + one combinatorial process

    Started by promach, 12th March 2018 11:52
    • Replies: 3
    • Views: 391
    12th March 2018, 14:10 Go to last post
    • Replies: 3
    • Views: 401
    12th March 2018, 11:54 Go to last post
  8. DDR to AXI INTERFACE.......

    Started by velu.plg, 7th March 2018 06:42
    • Replies: 3
    • Views: 455
    12th March 2018, 09:15 Go to last post
  9. FIFO output is as a Data Packet? Is that possible?

    Started by ram11, 10th March 2018 21:12
    • Replies: 10
    • Views: 587
    12th March 2018, 01:06 Go to last post
  10. problem with floating point ip core xilinx

    Started by jalal.baba, 10th March 2018 18:53
    • Replies: 3
    • Views: 389
    11th March 2018, 10:17 Go to last post
  11. shift_register_compare assert question

    Started by promach, 10th March 2018 15:34
    • Replies: 1
    • Views: 271
    10th March 2018, 18:15 Go to last post
  12. Spartan 6 x Spartan 7 Logic use comparison

    Started by pbernardi, 8th March 2018 14:34
    • Replies: 7
    • Views: 455
    9th March 2018, 14:01 Go to last post
  13. Parameterized bitwidth

    Started by promach, 9th March 2018 08:37
    • Replies: 2
    • Views: 287
    9th March 2018, 09:35 Go to last post
  14. What is mean by hierarchical boundaries ?

    Started by sarang5s5, 8th March 2018 14:08
    • Replies: 0
    • Views: 226
    8th March 2018, 14:08 Go to last post
  15. pcb design application with fpga

    Started by dodo_ahmed, 7th March 2018 22:30
    • Replies: 3
    • Views: 344
    8th March 2018, 09:23 Go to last post
  16. how to program adxl345 on DE10-Lite in verilog?

    Started by adam9, 5th March 2018 11:51
    • Replies: 8
    • Views: 446
    8th March 2018, 01:09 Go to last post
  17. Programmable Logic Devices nowadays

    Started by fluxcapacitor, 4th March 2018 19:20
    • Replies: 3
    • Views: 424
    6th March 2018, 17:28 Go to last post
  18. On off register to activate each load...

    Started by manush30, 5th March 2018 11:57
    • Replies: 4
    • Views: 353
    5th March 2018, 21:12 Go to last post
  19. [SOLVED] Compare vectors with threshold

    Started by nsgil85, 25th February 2018 15:28
    • Replies: 7
    • Views: 488
    5th March 2018, 09:43 Go to last post
    • Replies: 1
    • Views: 251
    4th March 2018, 07:25 Go to last post
  20. Determining the frequency of nco implemented in FPGA

    Started by dipin, 28th February 2018 11:27
    2 Pages
    1 2
    • Replies: 20
    • Views: 760
    2nd March 2018, 15:16 Go to last post