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Threads 19171 to 19198 of 19198

Forum: Analog Integrated Circuit (IC) Design, Layout and Fabrication

Analog Integrated Circuit Design, Layout & Fabrication Questions. Analog ASIC Design. Semiconductor Technology Issues.

  1. Closed: Hspice MOS models and non-quasi static effect

    Started by khouly, 31st January 2004 14:53
    • Replies: 7
    • Views: 6,444
    19th February 2004, 00:28 Go to last post
  2. Closed: How do you take bulk effect into accout?

    Started by hardings, 31st December 2003 03:45
    • Replies: 10
    • Views: 4,252
    18th February 2004, 13:52 Go to last post
  3. Closed: Temperature Sensor - A mixed Signal-Problem!

    Started by Kuehnsen, 17th February 2004 22:37
    • Replies: 1
    • Views: 2,350
    17th February 2004, 23:51 Go to last post
  4. Closed: programmable DSP Vs programmable ASICs

    Started by nalsai, 12th February 2004 12:56
    • Replies: 0
    • Views: 2,062
    12th February 2004, 12:56 Go to last post
  5. Closed: need "real world FPGA design with verilog"

    Started by wj98765, 10th February 2004 08:30
    • Replies: 1
    • Views: 2,777
    11th February 2004, 08:43 Go to last post
  6. Closed: Modem Noise Killer article by Singer

    Started by jimjim2k, 11th February 2004 08:36
    • Replies: 0
    • Views: 2,377
    11th February 2004, 08:36 Go to last post
  7. Closed: How to tune the devices parameters in process?

    Started by Hughes, 9th January 2004 03:07
    • Replies: 2
    • Views: 4,561
    27th January 2004, 07:03 Go to last post
  8. noise effects in VLSI deesign...

    Started by alisoleimani, 26th January 2004 10:07
    • Replies: 1
    • Views: 2,110
    26th January 2004, 10:50 Go to last post
  9. Closed: who can give a paper compare all buffers in op-amps?

    Started by mike_bihan, 18th January 2004 06:40
    • Replies: 5
    • Views: 2,755
    24th January 2004, 13:40 Go to last post
  10. Closed: high speed cmos pll(7GHz) in 0.13 cmos tsmc, delay vco

    Started by cretu, 15th December 2003 23:42
    • Replies: 13
    • Views: 6,977
    20th January 2004, 05:34 Go to last post
  11. Closed: IGBT driver's Pspice model - I need it!

    Started by marekmaro, 17th January 2004 17:14
    • Replies: 0
    • Views: 3,338
    17th January 2004, 17:14 Go to last post
  12. Closed: How to model the switched-capacitor Half Cycle Gain Stage

    Started by ynhe, 3rd January 2004 15:33
    • Replies: 7
    • Views: 4,191
    16th January 2004, 04:24 Go to last post
  13. Closed: [help] *.gds to *.dwg or *.dxf

    Started by speedracer, 15th January 2004 09:06
    • Replies: 1
    • Views: 8,427
    15th January 2004, 14:36 Go to last post
  14. Closed: 120v zero cross detector

    Started by Myren, 14th January 2004 11:26
    • Replies: 3
    • Views: 8,108
    15th January 2004, 00:10 Go to last post
  15. Closed: I want a technics parameter

    Started by wuxwen80, 14th January 2004 06:59
    • Replies: 0
    • Views: 2,406
    14th January 2004, 06:59 Go to last post
  16. Closed: Parasitic R&C extraction for analog post layout simulati

    Started by Humungus, 9th January 2004 01:45
    • Replies: 0
    • Views: 2,744
    9th January 2004, 01:45 Go to last post
  17. Closed: C@dence Virtuoso schematic composer

    Started by mlxsae, 5th January 2004 09:26
    • Replies: 11
    • Views: 10,457
    8th January 2004, 23:55 Go to last post
  18. Closed: analog Design and testing

    Started by simphibie, 16th December 2003 15:04
    • Replies: 10
    • Views: 5,020
    7th January 2004, 11:42 Go to last post
  19. Closed: What is the latest development of Analog EDA?

    Started by hoteagle, 5th January 2004 03:34
    • Replies: 5
    • Views: 3,255
    6th January 2004, 10:27 Go to last post
  20. Closed: CMOS max sink current

    Started by mrcube_ns, 6th January 2004 00:50
    • Replies: 1
    • Views: 3,985
    6th January 2004, 05:46 Go to last post
  21. Closed: RealTimeControl principle in Philips Video Encoders/Decoders

    Started by spktu, 6th January 2004 01:22
    • Replies: 0
    • Views: 2,398
    6th January 2004, 01:22 Go to last post
  22. Closed: Does post-layout simulation make design more accurate?

    Started by tsinghua, 30th December 2003 12:16
    • Replies: 6
    • Views: 3,727
    3rd January 2004, 20:10 Go to last post
  23. Closed: Does BuildGates v5.09 run in Solaris 9?

    Started by dd2001, 26th December 2003 02:22
    • Replies: 2
    • Views: 2,408
    28th December 2003, 04:23 Go to last post
  24. Closed: Is BuildGates 5.09 the latest version?

    Started by dd2001, 26th December 2003 02:19
    • Replies: 1
    • Views: 2,714
    26th December 2003, 02:40 Go to last post
  25. Closed: A discussion about circuit design from a general point?

    Started by hardings, 20th December 2003 02:56
    • Replies: 4
    • Views: 3,134
    23rd December 2003, 18:40 Go to last post
  26. Closed: Problem with LNA and mixer (observing a lot of harmonics)

    Started by brmadhukar, 15th December 2003 13:08
    • Replies: 3
    • Views: 3,199
    23rd December 2003, 08:46 Go to last post
  27. Closed: help:need measure power using cadence

    Started by ramaro, 6th June 2009 23:57
    • Replies: 0
    • Views: 1,764
    14th January 1970, 10:11 Go to last post
  28. Closed: +/- 14V swicth in 3V process with 3V vdd.

    Started by tekno1, 9th September 2007 16:43
    • Replies: 0
    • Views: 1,431
    11th January 1970, 11:45 Go to last post