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Threads 15001 to 15030 of 19274

Forum: Analog Integrated Circuit (IC) Design, Layout and Fabrication

Analog Integrated Circuit Design, Layout & Fabrication Questions. Analog ASIC Design. Semiconductor Technology Issues.

  1. Closed: Reference simulation problem

    Started by hktk, 16th January 2007 15:00
    • Replies: 18
    • Views: 2,284
    26th January 2007, 14:15 Go to last post
  2. Closed: Antenna diodes explanation

    Started by cellphone, 5th January 2007 19:52
    • Replies: 8
    • Views: 22,489
    26th January 2007, 06:43 Go to last post
  3. Closed: how to export output data to s2p or Citi files in SpectreRF.

    Started by loverrf, 26th January 2007 02:53
    • Replies: 0
    • Views: 3,044
    26th January 2007, 02:53 Go to last post
  4. Closed: help : about virtuoso display issues

    Started by Areky_qin, 8th December 2006 18:59
    • Replies: 7
    • Views: 2,035
    25th January 2007, 07:56 Go to last post
  5. Closed: How to find Lambda value using simulation?

    Started by Usman Hai, 22nd January 2007 16:49
    • Replies: 2
    • Views: 1,693
    24th January 2007, 22:45 Go to last post
  6. Closed: Voltage error of pipeline ADC !

    Started by jeniffer, 19th January 2007 03:49
    • Replies: 3
    • Views: 1,121
    24th January 2007, 21:54 Go to last post
  7. Closed: Still wondering about cascode transistors' effective (W/L)

    Started by DZC, 24th January 2007 08:27
    • Replies: 2
    • Views: 994
    24th January 2007, 11:36 Go to last post
  8. Closed: Question about testing the settle time. (update)

    Started by jeff_zx, 23rd January 2007 10:54
    • Replies: 6
    • Views: 1,226
    24th January 2007, 11:08 Go to last post
  9. Closed: needed this docs Timothy M. Hollis, “Compensation Techniques

    Started by manissri, 23rd January 2007 15:03
    • Replies: 5
    • Views: 1,049
    24th January 2007, 10:49 Go to last post
  10. Closed: diode connected capacitor?

    Started by lucky8, 29th December 2006 04:57
    • Replies: 8
    • Views: 2,869
    24th January 2007, 05:54 Go to last post
  11. Closed: Comparator inverter stage

    Started by invent, 10th January 2007 05:57
    • Replies: 4
    • Views: 2,378
    24th January 2007, 05:44 Go to last post
  12. Closed: 7-segment 6's and 9's

    Started by velson, 23rd January 2007 10:53
    • Replies: 2
    • Views: 1,124
    23rd January 2007, 22:47 Go to last post
  13. Closed: [Hspice]How to plot derivative or integral value of a curve

    Started by pugongying, 23rd October 2006 06:04
    • Replies: 8
    • Views: 20,607
    23rd January 2007, 22:00 Go to last post
  14. Closed: What's the SPICE compatibility of a model?

    Started by carlyou, 23rd January 2007 14:18
    • Replies: 0
    • Views: 1,015
    23rd January 2007, 14:18 Go to last post
  15. Closed: question about MOS CML circuit

    Started by bageduke, 19th January 2007 22:35
    • Replies: 5
    • Views: 2,002
    23rd January 2007, 09:04 Go to last post
  16. Closed: Mosclamp with bondpads

    Started by swathi.kamath, 23rd January 2007 07:00
    • Replies: 1
    • Views: 754
    23rd January 2007, 07:49 Go to last post
  17. Closed: Difference between two cascode configuration???

    Started by DZC, 23rd January 2007 03:42
    • Replies: 1
    • Views: 1,057
    23rd January 2007, 07:34 Go to last post
  18. Closed: Phase Noise for dividers on Mentor tools

    Started by ramy_maia, 22nd January 2007 23:14
    • Replies: 0
    • Views: 911
    22nd January 2007, 23:14 Go to last post
  19. Closed: Isolation cell between logic islands

    Started by dhaab, 17th January 2007 23:56
    • Replies: 1
    • Views: 1,532
    22nd January 2007, 21:11 Go to last post
  20. Closed: Question about PSRR value in LDO

    Started by safwatonline, 22nd January 2007 18:45
    • Replies: 0
    • Views: 965
    22nd January 2007, 18:45 Go to last post
  21. Closed: Cadence- parasitic capacitances problem

    Started by drabos, 22nd January 2007 15:28
    • Replies: 2
    • Views: 2,222
    22nd January 2007, 16:34 Go to last post
  22. Closed: Difference between Diva, Dracula, and Assura??

    Started by ee484, 21st January 2007 23:00
    • Replies: 4
    • Views: 5,461
    22nd January 2007, 10:37 Go to last post
  23. Closed: Resistor mismatch in 10 bit DAC

    Started by Vabzter, 18th January 2007 09:19
    • Replies: 2
    • Views: 1,859
    22nd January 2007, 08:08 Go to last post
  24. Closed: What are the effects of process variation on gain?

    Started by estradasphere, 17th January 2007 22:18
    • Replies: 5
    • Views: 1,679
    22nd January 2007, 06:49 Go to last post
  25. Closed: Pdiode in Deep N well..

    Started by swathi.kamath, 20th January 2007 10:01
    • Replies: 1
    • Views: 2,586
    22nd January 2007, 06:05 Go to last post
  26. Closed: How do you deal with patents when you are designing a chip?

    Started by hyy95120, 12th January 2007 07:24
    • Replies: 13
    • Views: 1,635
    22nd January 2007, 05:04 Go to last post
  27. Closed: divider noise in pll

    Started by ravet, 21st January 2007 15:04
    • Replies: 0
    • Views: 1,047
    21st January 2007, 15:04 Go to last post
  28. Closed: What should I do to get points?

    Started by cemgiz, 21st January 2007 01:48
    • Replies: 1
    • Views: 734
    21st January 2007, 06:02 Go to last post
  29. Closed: Strange representation of MOSFET in ADS layout

    Started by manish12, 10th January 2007 07:38
    • Replies: 2
    • Views: 1,023
    20th January 2007, 16:27 Go to last post
  30. Closed: Level-shifter papers?

    Started by bjerkely, 23rd December 2006 22:08
    • Replies: 3
    • Views: 1,426
    20th January 2007, 09:58 Go to last post