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Forum: Analog Circuit Design

Analog Circuit Design questions. Power Supplies, Amplifiers

  1. Sticky Thread Sticky: Read this before posting.

    Started by pranam77, 21st August 2009 09:10
    • Replies: 0
    • Views: 31,372
    pranam77
    21st August 2009, 09:10 Go to last post

  1. Control Loop Compensation on Synchronous Buck DC-DC?

    Started by berger.h, 20th February 2019 11:59
    2 Attachment(s)
    • Replies: 7
    • Views: 158
    Akanimo
    Today, 17:46 Go to last post

  2. understanding bode plot characteristics

    Started by moro, 20th February 2019 10:45
    6 Attachment(s)
    • Replies: 6
    • Views: 171
    FvM
    Today, 15:25 Go to last post

  3. How to implement a transfer function with discrete components

    Started by garvind25, 8th February 2019 14:46
    2 Pages •
    1 2
    3 Attachment(s)
    • Replies: 24
    • Views: 720
    FvM
    Today, 09:42 Go to last post

  4. Cascading amplifier with a line driver for an analog signal transmission

    Started by doncarlosalbatros, Today 00:11
    2 Attachment(s)
    • Replies: 2
    • Views: 128
    FvM
    Today, 09:32 Go to last post

  5. gmin conductance problem in tspice

    Started by rimi17, Yesterday 06:15
    1 Attachment(s)
    • Replies: 4
    • Views: 102
    pancho_hideboo
    Today, 05:58 Go to last post

  6. Emitter-coupled logic operation

    Started by promach, Yesterday 02:30
    • Replies: 4
    • Views: 146
    dick_freebird
    Today, 03:35 Go to last post

  7. Need help with fully differential amplifier

    Started by doncarlosalbatros, 18th February 2019 11:59
    • Replies: 5
    • Views: 192
    FvM
    Yesterday, 22:35 Go to last post

  8. time delay for Folded cascode Opamp

    Started by sdvc, 20th February 2019 17:49
    • Replies: 3
    • Views: 99
    frankrose
    Yesterday, 10:44 Go to last post

  9. Square wave output topology

    Started by giuliamar, 20th February 2019 19:00
    • Replies: 1
    • Views: 99
    barry
    20th February 2019, 22:19 Go to last post

  10. Boost Converter (Problem in getting transient analysis)

    Started by manasguttal, 20th February 2019 13:36
    • Replies: 1
    • Views: 71
    SunnySkyguy
    20th February 2019, 17:01 Go to last post

  11. LDO Voltage Regulator

    Started by vicky2904, 8th February 2019 15:56
    3 Attachment(s)
    • Replies: 11
    • Views: 386
    lgutierrez
    20th February 2019, 16:07 Go to last post

  12. 3.7V lithium ion battery charger

    Started by electronic_hobbyist, 19th February 2019 18:00
    3 Attachment(s)
    • Replies: 4
    • Views: 141
    SunnySkyguy
    20th February 2019, 09:38 Go to last post

  13. Voltage Drop Issue across Diode Bank.

    Started by uj1964, 19th February 2019 10:39
    • Replies: 5
    • Views: 132
    uj1964
    20th February 2019, 05:24 Go to last post

  14. Opamp slew rate measurment

    Started by akbarza, 18th February 2019 17:53
    2 Attachment(s)
    • Replies: 3
    • Views: 132
    dick_freebird
    18th February 2019, 20:20 Go to last post

  15. Dummy capacitor in capacitive DAC array

    Started by Chinmaye, 18th February 2019 12:21
    • Replies: 1
    • Views: 97
    Dominik Przyborowski
    18th February 2019, 19:57 Go to last post

  16. Electronics system design

    Started by sutapanaki, 6th February 2019 21:35
    • Replies: 4
    • Views: 371
    sutapanaki
    18th February 2019, 10:23 Go to last post

  17. [SOLVED] Potentiostatic circuit operation and ADC interface

    Started by eengr, 17th February 2019 14:48
    3 Attachment(s)
    • Replies: 2
    • Views: 108
    FvM
    17th February 2019, 22:58 Go to last post

  18. Op-amp design to use in 8 bit R-2R ladder DAC

    Started by circuitking, 16th February 2019 23:30
    • Replies: 6
    • Views: 189
    Dominik Przyborowski
    17th February 2019, 16:53 Go to last post

  19. Capacitance and fringing equation

    Started by schmitta, 16th February 2019 01:38
    • Replies: 2
    • Views: 144
    schmitta
    17th February 2019, 00:46 Go to last post

  20. Gyrator circuit discussion

    Started by promach, 15th February 2019 15:18
    3 Attachment(s)
    • Replies: 2
    • Views: 163
    BradtheRad
    16th February 2019, 20:09 Go to last post

  21. Low cost amplifier for 12bit ADC SAR?

    Started by Coper, 8th February 2019 10:06
    1 Attachment(s)
    • Replies: 7
    • Views: 216
    asdf44
    16th February 2019, 16:03 Go to last post

  22. Design of a linear low-dropout voltage regulator in 0.18um cmos technology

    Started by chenkhai95, 12th February 2019 10:46
    7 Attachment(s)
    • Replies: 7
    • Views: 334
    chenkhai95
    16th February 2019, 13:30 Go to last post

  23. cascading filter after a 2 poles sallenkey

    Started by el00, 12th February 2019 16:53
    3 Pages •
    1 2 3
    7 Attachment(s)
    • Replies: 46
    • Views: 855
    LvW
    16th February 2019, 10:10 Go to last post

  24. Implementation of a FeFET based circuit in AWR simulator

    Started by hosseineslahi7, 15th February 2019 02:45
    • Replies: 1
    • Views: 100
    BigBoss
    15th February 2019, 04:46 Go to last post

  25. Quick way for an adjustable low pass filter

    Started by doncarlosalbatros, 13th February 2019 11:53
    2 Attachment(s)
    • Replies: 17
    • Views: 433
    KlausST
    15th February 2019, 03:04 Go to last post

  26. Looking for BJT that has very low collector leakage current.

    Started by Alan8947, 14th February 2019 20:49
    • Replies: 3
    • Views: 155
    KlausST
    15th February 2019, 02:36 Go to last post

  27. How to make a better design for this SMPS post regulator filter circuit?

    Started by doncarlosalbatros, 6th February 2019 13:02
    2 Pages •
    1 2
    10 Attachment(s)
    • Replies: 21
    • Views: 660
    doncarlosalbatros
    14th February 2019, 16:50 Go to last post

  28. data and clock synchronization using 74HC4046 PLL

    Started by shahbaz.ele, 16th October 2018 10:52
    • Replies: 12
    • Views: 877
    FvM
    14th February 2019, 00:35 Go to last post

  29. Inverter based power on reset

    Started by deveshkm, 13th February 2019 10:30
    1 Attachment(s)
    • Replies: 4
    • Views: 150
    dick_freebird
    13th February 2019, 19:20 Go to last post

  30. What does the LOOP GAIN's phase and gain margin say about the CLOSED LOOP response?

    Started by jaydnul, 8th February 2019 18:49
    • Replies: 5
    • Views: 377
    FvM
    13th February 2019, 13:27 Go to last post
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