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Forum: PLD, SPLD, GAL, CPLD, FPGA Design

Simple and Complex Programmable Logic Devices from Altera, Cypress, Xilinx. Field Programmable Gate Array. Device specific VHDL/Verilog/SystemC questions.

  1. Sticky Thread Sticky: IEEE Standard for Standard SystemC® Language Reference Manual

    Started by bassa, 17th January 2012 04:22
    • Replies: 2
    • Views: 26,900
    2nd June 2013, 16:13 Go to last post
  2. Sticky Thread Sticky: ALL E-BOOKS HERE WILL BE DELETED!!! USERS WILL BE WARNED !!!

    Started by klug, 21st March 2007 21:21
    • Replies: 0
    • Views: 31,973
    21st March 2007, 21:21 Go to last post
  1. Import chipscopes data to matlab

    Started by amin5659, Yesterday 13:29
    • Replies: 5
    • Views: 120
    Today, 09:09 Go to last post
  2. [SOLVED] Verilog read-file task, unexpected behaviour

    Started by wesleytaylor, Yesterday 10:32
    • Replies: 1
    • Views: 92
    Yesterday, 16:46 Go to last post
  3. Not enough IOB of a certain FPGA

    Started by MSAKARIM, 16th June 2019 16:00
    • Replies: 9
    • Views: 234
    Yesterday, 09:48 Go to last post
  4. Vivado Timing Constraint

    Started by Mai89, 16th June 2019 10:57
    • Replies: 2
    • Views: 97
    Yesterday, 09:44 Go to last post
  5. Active-HDL VHDL simulation problem

    Started by ashueda, 8th June 2019 06:46
    • Replies: 11
    • Views: 451
    16th June 2019, 19:36 Go to last post
    • Replies: 5
    • Views: 217
    15th June 2019, 23:16 Go to last post
    • Replies: 13
    • Views: 553
    13th June 2019, 22:06 Go to last post
    • Replies: 0
    • Views: 101
    13th June 2019, 08:53 Go to last post
  6. Interfacing 16*2 LCD with DE0_nano

    Started by vsnarkhede13, 12th June 2019 11:32
    • Replies: 2
    • Views: 146
    13th June 2019, 07:12 Go to last post
    • Replies: 6
    • Views: 238
    7th June 2019, 09:03 Go to last post
  7. [SOLVED] for generate with step other than one

    Started by Mai89, 6th June 2019 19:25
    • Replies: 3
    • Views: 185
    7th June 2019, 02:32 Go to last post
  8. Unknown xx req signal for NoC coding

    Started by promach, 29th May 2019 08:13
    • Replies: 6
    • Views: 750
    6th June 2019, 07:46 Go to last post
  9. [SOLVED] How to interpret a .RPD file to write image in FPGA Flash Memory

    Started by Humusk, 4th June 2019 18:30
    • Replies: 6
    • Views: 468
    5th June 2019, 14:51 Go to last post
  10. Connecting a SPDT switch to I/O pin of a CPLD

    Started by garvind25, 4th June 2019 17:24
    • Replies: 9
    • Views: 281
    5th June 2019, 13:32 Go to last post
  11. Best Benchmark for mobile processors

    Started by Zerox100, 3rd June 2019 12:55
    • Replies: 0
    • Views: 142
    3rd June 2019, 12:55 Go to last post
  12. Need some help-PwmAudio in VHDL

    Started by yuly330, 31st May 2019 21:44
    • Replies: 1
    • Views: 434
    31st May 2019, 23:26 Go to last post
  13. HC05 UART Communication Data Rate

    Started by matriX_1500, 28th May 2019 13:16
    • Replies: 7
    • Views: 478
    29th May 2019, 15:57 Go to last post
  14. FPGA ASIC gate count

    Started by Hithaishi, 28th May 2019 06:13
    • Replies: 3
    • Views: 248
    28th May 2019, 18:16 Go to last post
    • Replies: 15
    • Views: 727
    27th May 2019, 23:31 Go to last post
  15. [SOLVED] Problem with UART clock value in a VHDL sample code

    Started by matriX_1500, 26th May 2019 12:10
    • Replies: 9
    • Views: 681
    26th May 2019, 20:26 Go to last post
  16. kintex 7 bpi programming error

    Started by shand_12, 23rd May 2019 12:13
    • Replies: 1
    • Views: 471
    24th May 2019, 00:13 Go to last post
    • Replies: 6
    • Views: 907
    22nd May 2019, 01:47 Go to last post
  17. VHDL code for 74hc4094

    Started by sa007jbond, 19th May 2019 12:55
    • Replies: 2
    • Views: 324
    21st May 2019, 08:10 Go to last post
  18. rem and mod operators

    Started by mahmood.n, 18th May 2019 07:59
    • Replies: 10
    • Views: 1,436
    20th May 2019, 16:22 Go to last post
  19. Including VHDL libraries to add two signals

    Started by joniengr, 17th May 2019 08:42
    • Replies: 8
    • Views: 1,977
    17th May 2019, 19:15 Go to last post
    • Replies: 4
    • Views: 263
    17th May 2019, 07:46 Go to last post
    • Replies: 1
    • Views: 293
    16th May 2019, 21:32 Go to last post