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Forum: ASIC Design Methodologies and Tools (Digital)

ASIC (Application Specific Integrated Circuit) design methodologies design tool (simulator, synthesis...) related questions

  1. Sticky Thread Sticky: ALL E-BOOKS HERE WILL BE DELETED!!! USERS WILL BE WARNED!!!

    Started by klug, 25th March 2007 08:41
    • Replies: 0
    • Views: 30,267
    25th March 2007, 08:41 Go to last post
  1. Divison by 2 syntesizable RTL coding

    Started by sky_above, 26th May 2018 16:55
    • Replies: 4
    • Views: 79
    Yesterday, 23:01 Go to last post
  2. Output combinational output and valid sequential

    Started by sky_above, 26th May 2018 16:22
    • Replies: 3
    • Views: 66
    Yesterday, 22:19 Go to last post
    • Replies: 0
    • Views: 31
    26th May 2018, 15:48 Go to last post
  3. Read operation of a memory and clock cycles

    Started by sky_above, 26th May 2018 07:34
    • Replies: 2
    • Views: 62
    26th May 2018, 12:08 Go to last post
  4. Timing through the d pin

    Started by stanford, 22nd May 2018 06:23
    • Replies: 3
    • Views: 118
    26th May 2018, 00:23 Go to last post
  5. Async set deassertion

    Started by stanford, 25th May 2018 07:03
    • Replies: 1
    • Views: 74
    25th May 2018, 23:40 Go to last post
  6. CADENCE XSIM Default Timescale

    Started by jiminization, 25th May 2018 12:29
    • Replies: 1
    • Views: 41
    25th May 2018, 17:43 Go to last post
  7. D flip flop RTL without Qbar

    Started by sky_above, 24th May 2018 14:37
    • Replies: 7
    • Views: 103
    24th May 2018, 19:15 Go to last post
  8. [SOLVED] Synthesize an RTL from two technology .db files (of same node)

    Started by ranaya, 22nd May 2018 20:17
    • Replies: 6
    • Views: 138
    24th May 2018, 15:09 Go to last post
  9. Clock gating and cdc on clock_req

    Started by stanford, 22nd May 2018 23:15
    • Replies: 3
    • Views: 174
    24th May 2018, 10:49 Go to last post
    • Replies: 3
    • Views: 222
    22nd May 2018, 06:47 Go to last post
  10. DC-topo and ICC environment comparison

    Started by ua6bqg, 7th May 2018 17:19
    • Replies: 6
    • Views: 249
    22nd May 2018, 01:38 Go to last post
    • Replies: 15
    • Views: 333
    21st May 2018, 17:15 Go to last post
    • Replies: 7
    • Views: 342
    18th May 2018, 19:38 Go to last post
  11. Selecting CTS topology in ICC

    Started by Vamsi Srikanth S, 17th May 2018 12:57
    • Replies: 2
    • Views: 136
    17th May 2018, 19:04 Go to last post
  12. Questions on DFT autofix

    Started by childs72, 17th May 2018 02:54
    • Replies: 1
    • Views: 98
    17th May 2018, 07:06 Go to last post
  13. PTPX Switching power calculation

    Started by Mohammed Abrar, 16th May 2018 01:06
    • Replies: 1
    • Views: 124
    17th May 2018, 05:34 Go to last post
  14. RTL for linear search

    Started by sky_above, 14th May 2018 13:59
    • Replies: 19
    • Views: 525
    16th May 2018, 15:11 Go to last post
  15. 4 bit multiplier from 2 bit multiplier

    Started by sky_above, 14th May 2018 13:56
    • Replies: 3
    • Views: 106
    14th May 2018, 15:24 Go to last post
    • Replies: 1
    • Views: 226
    11th May 2018, 13:40 Go to last post
    • Replies: 3
    • Views: 274
    10th May 2018, 14:34 Go to last post