1. Announcement:
    Forum rules & policies (quick reference)
    alexan_e (Administrator)
    7th August 2014
    Views:
    131,304
Page 1 of 822 1 2 3 11 51 101 501 ... LastLast
Threads 1 to 30 of 24660

Forum: ASIC Design Methodologies and Tools (Digital)

ASIC (Application Specific Integrated Circuit) design methodologies design tool (simulator, synthesis...) related questions

  1. Sticky Thread Sticky: ALL E-BOOKS HERE WILL BE DELETED!!! USERS WILL BE WARNED!!!

    Started by klug, 25th March 2007 08:41
    • Replies: 0
    • Views: 37,288
    25th March 2007, 08:41 Go to last post
  1. DFT -lbist pattern simulation

    Started by avinashkumar, Yesterday 12:57
    • Replies: 0
    • Views: 71
    Yesterday, 12:57 Go to last post
  2. DFT compiler commands

    Started by chis4yu, Yesterday 08:20
    • Replies: 0
    • Views: 98
    Yesterday, 08:20 Go to last post
  3. Memory repair with efuse and bira

    Started by mona_patel, Yesterday 06:09
    • Replies: 0
    • Views: 99
    Yesterday, 06:09 Go to last post
  4. Tetramax custom patterns

    Started by chis4yu, 25th May 2020 22:26
    • Replies: 0
    • Views: 94
    25th May 2020, 22:26 Go to last post
  5. DRC rules for Double Pattern Test

    Started by aditya1579, 25th May 2020 08:53
    • Replies: 1
    • Views: 157
    25th May 2020, 18:39 Go to last post
  6. Floorplanning Guidelines for TSMC 7nm

    Started by aditya1579, 21st May 2020 12:47
    • Replies: 5
    • Views: 394
    24th May 2020, 09:54 Go to last post
  7. DFT compiler with multimodes

    Started by chis4yu, 23rd May 2020 01:21
    • Replies: 0
    • Views: 153
    23rd May 2020, 01:21 Go to last post
  8. Port placement in a design block

    Started by karthikshetty, 22nd May 2020 05:01
    • Replies: 0
    • Views: 253
    22nd May 2020, 05:01 Go to last post
  9. COmparator using xor gate

    Started by djc, 20th May 2020 07:41
    • Replies: 6
    • Views: 355
    21st May 2020, 10:13 Go to last post
  10. CADENCE is disabling functions alone

    Started by lufer17, 18th May 2020 14:28
    • Replies: 6
    • Views: 363
    20th May 2020, 22:20 Go to last post
  11. CADENCE: layout error

    Started by lufer17, 18th May 2020 14:45
    • Replies: 8
    • Views: 414
    20th May 2020, 15:05 Go to last post
  12. MBIST clocks synchronization

    Started by mona_patel, 19th May 2020 07:13
    • Replies: 2
    • Views: 246
    20th May 2020, 10:32 Go to last post
    • Replies: 7
    • Views: 604
    19th May 2020, 15:30 Go to last post
  13. [SOLVED] P&R Buffer Reduction in a Shift Register

    Started by ranaya, 17th May 2020 18:02
    • Replies: 8
    • Views: 408
    19th May 2020, 15:28 Go to last post
    • Replies: 2
    • Views: 340
    19th May 2020, 15:20 Go to last post
  14. Plotting delay vs. load capacitance in Hspice

    Started by reddvoid, 19th May 2020 08:34
    • Replies: 0
    • Views: 144
    19th May 2020, 08:34 Go to last post
  15. VCS2016 cannot compile ok

    Started by luoyanghero, 18th May 2020 11:09
    • Replies: 0
    • Views: 243
    18th May 2020, 11:09 Go to last post
    • Replies: 1
    • Views: 266
    17th May 2020, 19:05 Go to last post
  16. ModelSim/QuestaSim SE/PE versions -> what's mean?

    Started by ivlsi, 15th May 2020 13:17
    • Replies: 1
    • Views: 211
    15th May 2020, 15:34 Go to last post
  17. Sequential depth in DFT

    Started by msancheti, 15th May 2020 12:49
    • Replies: 0
    • Views: 127
    15th May 2020, 12:49 Go to last post
    • Replies: 0
    • Views: 168
    15th May 2020, 02:06 Go to last post
    • Replies: 0
    • Views: 158
    14th May 2020, 18:12 Go to last post
  18. Other end arrival time

    Started by guptya, 6th May 2020 13:19
    • Replies: 7
    • Views: 825
    14th May 2020, 11:02 Go to last post
  19. Modelsim Coverage Reporting

    Started by Battawi, 12th May 2020 22:16
    • Replies: 3
    • Views: 358
    13th May 2020, 15:34 Go to last post
  20. [SOLVED] Zero Values For Internal Power

    Started by janthonym, 6th May 2020 18:51
    • Replies: 2
    • Views: 290
    7th May 2020, 12:08 Go to last post
    • Replies: 0
    • Views: 194
    7th May 2020, 11:40 Go to last post
    • Replies: 1
    • Views: 795
    7th May 2020, 09:11 Go to last post
  21. Cadence simulation graph versus time

    Started by lufer17, 6th May 2020 20:28
    • Replies: 1
    • Views: 282
    7th May 2020, 05:39 Go to last post