Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

DESIGN OF THE SINGLE CYCLE MICROPROCESSOR USING VERILOG HDL

Here I have uploaded my designed single cycle 8-bit CISC microprocessor using Verilog HDL. So Let's see and try your own as per your specification.

First of all, as we know CISC microprocessor has separate instruction memory and data memory so here I have make two text file for that and then designed one by one block of the microprocessor such as clock generation, ALU(Arithmetic Logical Unit), File reading as well as writing back, ...etc.

For code click here

Comments

There are no comments to display.

Part and Inventory Search

Blog entry information

Author
Nishit97
Read time
1 min read
Views
1,139
Last update

Downloads

  • data.txt
    1.3 KB · Views: 322
  • instruction.txt
    129 bytes · Views: 325

More entries in FPGA

More entries from Nishit97

Share this entry

Back
Top