CPU-EO Project Status
Project File: CPU-eo.ise Current State: Programming File Generated
Module Name: cpu4_6_sample
  • Errors:
No Errors
Target Device: xc3s100e-4cp132
  • Warnings:
59 Warnings
Product Version: ISE 8.2i
  • Updated:
Sat Nov 29 17:28:22 2014
 
CPU-EO Partition Summary
No partition information was found.
 
Device Utilization Summary
Logic UtilizationUsedAvailableUtilizationNote(s)
Total Number Slice Registers 190 1,920 9%  
    Number used as Flip Flops 171      
    Number used as Latches 19      
Number of 4 input LUTs 615 1,920 32%  
Logic Distribution     
Number of occupied Slices 416 960 43%  
    Number of Slices containing only related logic 416 416 100%  
    Number of Slices containing unrelated logic 0 416 0%  
Total Number 4 input LUTs 618 1,920 32%  
Number used as logic 615      
Number used as a route-thru 3      
Number of bonded IOBs 14 83 16%  
    IOB Flip Flops 5      
Number of Block RAMs 1 4 25%  
Number of GCLKs 1 24 4%  
Total equivalent gate count for design 70,960      
Additional JTAG gate count for IOBs 672      
 
Performance Summary
Final Timing Score: 0 Pinout Data: Pinout Report
Routing Results: All Signals Completely Routed Clock Data: Clock Report
Timing Constraints: All Constraints Met    
 
Detailed Reports
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis ReportCurrentSat Nov 29 17:27:26 2014026 Warnings19 Infos
Translation ReportCurrentSat Nov 29 17:27:35 2014000
Map ReportCurrentSat Nov 29 17:27:45 2014015 Warnings3 Infos
Place and Route ReportCurrentSat Nov 29 17:28:01 201404 Warnings2 Infos
Static Timing ReportCurrentSat Nov 29 17:28:07 2014002 Infos
Bitgen ReportCurrentSat Nov 29 17:28:18 2014014 Warnings0
 
Secondary Reports
Report NameStatusGenerated
Xplorer Report