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Defines | |
#define | MAX_EP_NB 7 |
#define | EP_CONTROL 0 |
#define | EP_1 1 |
#define | EP_2 2 |
#define | EP_3 3 |
#define | EP_4 4 |
#define | EP_5 5 |
#define | EP_6 6 |
#define | EP_7 7 |
#define | PIPE_CONTROL 0 |
#define | PIPE_0 0 |
#define | PIPE_1 1 |
#define | PIPE_2 2 |
#define | PIPE_3 3 |
#define | PIPE_4 4 |
#define | PIPE_5 5 |
#define | PIPE_6 6 |
#define | PIPE_7 7 |
#define | MSK_EP_DIR 0x7F |
#define | MSK_UADD 0x7F |
#define | MSK_EPTYPE 0xC0 |
#define | MSK_EPSIZE 0x70 |
#define | MSK_EPBK 0x0C |
#define | MSK_DTSEQ 0x0C |
#define | MSK_NBUSYBK 0x03 |
#define | MSK_CURRBK 0x03 |
#define | MSK_DAT 0xFF |
#define | MSK_BYCTH 0x07 |
#define | MSK_BYCTL 0xFF |
#define | MSK_EPINT 0x7F |
#define | MSK_HADDR 0xFF |
#define | MSK_PNUM 0x07 |
#define | MSK_PRST 0x7F |
#define | MSK_PTYPE 0xC0 |
#define | MSK_PTOKEN 0x30 |
#define | MSK_PEPNUM 0x0F |
#define | MSK_PSIZE 0x70 |
#define | MSK_PBK 0x0C |
#define | MSK_NBUSYBK 0x03 |
#define | MSK_ERROR 0x1F |
#define | MSK_PTYPE 0xC0 |
#define | MSK_PTOKEN 0x30 |
#define | MSK_TOKEN_SETUP 0x30 |
#define | MSK_TOKEN_IN 0x10 |
#define | MSK_TOKEN_OUT 0x20 |
#define | MSK_PEPNUM 0x0F |
#define | MSK_PSIZE 0x70 |
#define | MSK_PBK 0x0C |
#define | TYPE_CONTROL 0 |
#define | TYPE_ISOCHRONOUS 1 |
#define | TYPE_BULK 2 |
#define | TYPE_INTERRUPT 3 |
#define | DIRECTION_OUT 0 |
#define | DIRECTION_IN 1 |
#define | SIZE_8 0 |
#define | SIZE_16 1 |
#define | SIZE_32 2 |
#define | SIZE_64 3 |
#define | SIZE_128 4 |
#define | SIZE_256 5 |
#define | SIZE_512 6 |
#define | SIZE_1024 7 |
#define | ONE_BANK 0 |
#define | TWO_BANKS 1 |
#define | NYET_ENABLED 0 |
#define | NYET_DISABLED 1 |
#define | TOKEN_SETUP 0 |
#define | TOKEN_IN 1 |
#define | TOKEN_OUT 2 |
#define | Is_ep_addr_in(x) ( (x&USB_ENDPOINT_DIR_MASK)? TRUE : FALSE) |
#define | VBUSRISE_20MS 0x00 |
OTG Timers customizing. | |
#define | VBUSRISE_50MS 0x01 |
#define | VBUSRISE_70MS 0x02 |
#define | VBUSRISE_100MS 0x03 |
#define | VBUSPULSE_15MS 0x20 |
#define | VBUSPULSE_23MS 0x21 |
#define | VBUSPULSE_31MS 0x22 |
#define | VBUSPULSE_40MS 0x23 |
#define | VFALLTMOUT_93MS 0x40 |
#define | VFALLTMOUT_105MS 0x41 |
#define | VFALLTMOUT_118MS 0x42 |
#define | VFALLTMOUT_131MS 0x43 |
#define | SRPMINDET_10US 0x60 |
#define | SRPMINDET_100US 0x61 |
#define | SRPMINDET_1MS 0x62 |
#define | SRPMINDET_11MS 0x63 |
#define | Usb_build_ep_config0(type, dir, nyet) ((type<<6) | (nyet<<1) | (dir)) |
#define | Usb_build_ep_config1(size, bank) ((size<<4) | (bank<<2) ) |
#define | usb_configure_endpoint(num, type, dir, size, bank, nyet) |
#define | Host_build_pipe_config0(type, token, ep_num) ((type<<6) | (token<<4) | (ep_num)) |
#define | Host_build_pipe_config1(size, bank) ((size<<4) | (bank<<2) ) |
#define | host_configure_pipe(num, type, token, ep_num, size, bank, freq) |
#define | Usb_enable_regulator() (UHWCON |= (1<<UVREGE)) |
Enable internal USB pads regulator. | |
#define | Usb_disable_regulator() (UHWCON &= ~(1<<UVREGE)) |
Disable internal USB pads regulator. | |
#define | Is_usb_regulator_enabled() ((UHWCON & (1<<UVREGE)) ? TRUE : FALSE) |
Check regulator enable bit. | |
#define | Usb_enable_uid_pin() (UHWCON |= (1<<UIDE)) |
Enable external UID pin. | |
#define | Usb_disable_uid_pin() (UHWCON &= ~(1<<UIDE)) |
Disable external UID pin. | |
#define | Usb_force_device_mode() (Usb_disable_uid_pin(), UHWCON |= (1<<UIMOD)) |
Disable external UID pin and force device mode. | |
#define | Usb_force_host_mode() (Usb_disable_uid_pin(), UHWCON &= ~(1<<UIMOD)) |
Disable external UID pin and force host mode. | |
#define | Usb_enable_uvcon_pin() (UHWCON |= (1<<UVCONE)) |
Enable external UVCON pin. | |
#define | Usb_disable_uvcon_pin() (UHWCON &= ~(1<<UVCONE)) |
Enable external UVCON pin. | |
#define | Usb_full_speed_mode() (UDCON &= ~(1<<LSM)) |
Use device full speed mode (default mode). | |
#define | Usb_low_speed_mode() (UDCON |= (1<<LSM)) |
For device mode, force low speed mode. | |
#define | Usb_enable() (USBCON |= ((1<<USBE) | (1<<OTGPADE))) |
Enable both USB interface and Vbus pad. | |
#define | Usb_disable() (USBCON &= ~((1<<USBE) | (1<<OTGPADE))) |
Disable both USB interface and Vbus pad. | |
#define | Is_usb_enabled() ((USBCON & (1<<USBE)) ? TRUE : FALSE) |
#define | Usb_engine_enable() (USBCON |= (1<<USBE) ) |
Enable USB engine only. | |
#define | Usb_engine_disable() (USBCON &= ~(1<<USBE)) |
Disable both USB interface and Vbus pad. | |
#define | Usb_enable_vbus_pad() (USBCON |= (1<<OTGPADE)) |
Enable VBUS pad. | |
#define | Usb_disable_vbus_pad() (USBCON &= ~(1<<OTGPADE)) |
Disable VBUS pad. | |
#define | Usb_select_device() (USBCON &= ~(1<<HOST)) |
#define | Usb_select_host() (USBCON |= (1<<HOST)) |
#define | Is_usb_host_enabled() ((USBCON & (1<<HOST)) ? TRUE : FALSE) |
#define | Is_usb_device_enabled() ((USBCON & (1<<HOST)) ? FALSE : TRUE) |
#define | Usb_freeze_clock() (USBCON |= (1<<FRZCLK)) |
Stop internal USB clock in interface (freeze the interface register). | |
#define | Usb_unfreeze_clock() (USBCON &= ~(1<<FRZCLK)) |
#define | Is_usb_clock_freezed() ((USBCON & (1<<FRZCLK)) ? TRUE : FALSE) |
#define | Usb_enable_id_interrupt() (USBCON |= (1<<IDTE)) |
#define | Usb_disable_id_interrupt() (USBCON &= ~(1<<IDTE)) |
#define | Is_usb_id_interrupt_enabled() ((USBCON & (1<<IDTE)) ? TRUE : FALSE) |
#define | Is_usb_id_device() ((USBSTA & (1<<ID)) ? TRUE : FALSE) |
#define | Is_usb_id_host() ((USBSTA & (1<<ID)) ? FALSE : TRUE) |
#define | Usb_ack_id_transition() (USBINT = ~(1<<IDTI)) |
#define | Is_usb_id_transition() ((USBINT & (1<<IDTI)) ? TRUE : FALSE) |
#define | Usb_enable_vbus_interrupt() (USBCON |= (1<<VBUSTE)) |
#define | Usb_disable_vbus_interrupt() (USBCON &= ~(1<<VBUSTE)) |
#define | Is_usb_vbus_interrupt_enabled() ((USBCON & (1<<VBUSTE)) ? TRUE : FALSE) |
#define | Is_usb_vbus_high() ((USBSTA & (1<<VBUS)) ? TRUE : FALSE) |
#define | Is_usb_vbus_low() ((USBSTA & (1<<VBUS)) ? FALSE : TRUE) |
#define | Usb_ack_vbus_transition() (USBINT = ~(1<<VBUSTI)) |
#define | Is_usb_vbus_transition() ((USBINT & (1<<VBUSTI)) ? TRUE : FALSE) |
#define | MSK_IDTE_VBUSTE ((1<<IDTE)|(1<<VBUSTE)) |
#define | Usb_get_general_interrupt() (USBINT & (USBCON & MSK_IDTE_VBUSTE)) |
returns the USB general interrupts (interrupt enabled) | |
#define | Usb_ack_all_general_interrupt() (USBINT = ~(USBCON & MSK_IDTE_VBUSTE)) |
acks the general interrupts (interrupt enabled) | |
#define | Usb_ack_cache_id_transition(x) ((x) &= ~(1<<IDTI)) |
#define | Usb_ack_cache_vbus_transition(x) ((x) &= ~(1<<VBUSTI)) |
#define | Is_usb_cache_id_transition(x) (((x) & (1<<IDTI)) ) |
#define | Is_usb_cache_vbus_transition(x) (((x) & (1<<VBUSTI))) |
#define | Usb_get_otg_interrupt() (OTGINT & OTGIEN) |
returns the USB Pad interrupts (interrupt enabled) | |
#define | Usb_ack_all_otg_interrupt() (OTGINT = ~OTGIEN) |
acks the USB Pad interrupts (interrupt enabled) | |
#define | Is_otg_cache_bconnection_error(x) (((x) & MSK_BCERRI)) |
#define | Usb_ack_cache_bconnection_error(x) ((x) &= ~MSK_BCERRI) |
#define | Usb_enter_dpram_mode() (UDPADDH = (1<<DPACC)) |
#define | Usb_exit_dpram_mode() (UDPADDH = (U8)~(1<<DPACC)) |
#define | Usb_set_dpram_address(addr) (UDPADDH = (1<<DPACC) + ((Uint16)addr >> 8), UDPADDL = (Uchar)addr) |
#define | Usb_write_dpram_byte(val) (UEDATX=val) |
#define | Usb_read_dpram_byte() (UEDATX) |
#define | Usb_enable_vbus() (OTGCON |= (1<<VBUSREQ)) |
requests for VBus activation | |
#define | Usb_disable_vbus() (OTGCON |= (1<<VBUSRQC)) |
requests for VBus desactivation | |
#define | Usb_enable_manual_vbus() (PORTE|=0x80,DDRE|=0x80,Usb_disable_uvcon_pin()) |
Manually request VBUS ON without UVCON signal from USB interface. | |
#define | Usb_disable_manual_vbus() (PORTE&=~0x80,DDRE|=0x80,Usb_enable_uvcon_pin()) |
Manually request VBUS OFF without UVCON signal from USB interface. | |
#define | Is_usb_vbus_manual_on() (((PINE&0x80) != 0) ? TRUE : FALSE) |
is vbus manually activated ? | |
#define | Usb_device_initiate_hnp() (OTGCON |= (1<<HNPREQ)) |
initiates a Host Negociation Protocol | |
#define | Usb_device_stop_hnp() (OTGCON &= ~(1<<HNPREQ)) |
stops a Host Negociation Protocol | |
#define | Usb_host_accept_hnp() (OTGCON |= (1<<HNPREQ)) |
accepts a Host Negociation Protocol | |
#define | Usb_host_reject_hnp() (OTGCON &= ~(1<<HNPREQ)) |
rejects a Host Negociation Protocol | |
#define | Usb_device_initiate_srp() (OTGCON |= (1<<SRPREQ)) |
initiates a Session Request Protocol | |
#define | Usb_select_vbus_srp_method() (OTGCON |= (1<<SRPSEL)) |
selects VBus as SRP method | |
#define | Usb_select_data_srp_method() (OTGCON &= ~(1<<SRPSEL)) |
selects data line as SRP method | |
#define | Usb_enable_vbus_hw_control() (OTGCON &= ~(1<<VBUSHWC)) |
enables hardware control on VBus | |
#define | Usb_disable_vbus_hw_control() (OTGCON |= (1<<VBUSHWC)) |
disables hardware control on VBus | |
#define | Is_usb_vbus_enabled() ((OTGCON & (1<<VBUSREQ)) ? TRUE : FALSE) |
tests if VBus has been requested | |
#define | Is_usb_hnp() ((OTGCON & (1<<HNPREQ)) ? TRUE : FALSE) |
tests if a HNP occurs | |
#define | Is_usb_device_srp() ((OTGCON & (1<<SRPREQ)) ? TRUE : FALSE) |
tests if a SRP from device occurs | |
#define | Is_usb_device_initiating_srp() ((OTGCON & (1<<SRPREQ)) ? TRUE : FALSE) |
tests if device is initiating SRP | |
#define | Set_otg_custom_timer(sel) (OTGTCON = sel) |
selects one of the four OTG timers and sets up the specified delay | |
#define | Usb_enable_suspend_time_out_interrupt() (OTGIEN |= (1<<STOE)) |
enables suspend time out interrupt | |
#define | Usb_disable_suspend_time_out_interrupt() (OTGIEN &= ~(1<<STOE)) |
disables suspend time out interrupt | |
#define | Is_suspend_time_out_interrupt_enabled() ((OTGIEN & (1<<STOE)) ? TRUE : FALSE) |
#define | Usb_ack_suspend_time_out_interrupt() (OTGINT &= ~(1<<STOI)) |
acks suspend time out interrupt | |
#define | Is_usb_suspend_time_out_interrupt() ((OTGINT & (1<<STOI)) ? TRUE : FALSE) |
tests if a suspend time out occurs | |
#define | Usb_enable_hnp_error_interrupt() (OTGIEN |= (1<<HNPERRE)) |
enables HNP error interrupt | |
#define | Usb_disable_hnp_error_interrupt() (OTGIEN &= ~(1<<HNPERRE)) |
disables HNP error interrupt | |
#define | Is_hnp_error_interrupt_enabled() ((OTGIEN & (1<<HNPERRE)) ? TRUE : FALSE) |
#define | Usb_ack_hnp_error_interrupt() (OTGINT &= ~(1<<HNPERRI)) |
acks HNP error interrupt | |
#define | Is_usb_hnp_error_interrupt() ((OTGINT & (1<<HNPERRI)) ? TRUE : FALSE) |
tests if a HNP error occurs | |
#define | Usb_enable_role_exchange_interrupt() (OTGIEN |= (1<<ROLEEXE)) |
enables role exchange interrupt | |
#define | Usb_disable_role_exchange_interrupt() (OTGIEN &= ~(1<<ROLEEXE)) |
disables role exchange interrupt | |
#define | Is_role_exchange_interrupt_enabled() ((OTGIEN & (1<<ROLEEXE)) ? TRUE : FALSE) |
#define | Usb_ack_role_exchange_interrupt() (OTGINT &= ~(1<<ROLEEXI)) |
acks role exchange interrupt | |
#define | Is_usb_role_exchange_interrupt() ((OTGINT & (1<<ROLEEXI)) ? TRUE : FALSE) |
tests if a role exchange occurs | |
#define | Usb_enable_bconnection_error_interrupt() (OTGIEN |= (1<<BCERRE)) |
enables B device connection error interrupt | |
#define | Usb_disable_bconnection_error_interrupt() (OTGIEN &= ~(1<<BCERRE)) |
disables B device connection error interrupt | |
#define | Is_bconnection_error_interrupt_enabled() ((OTGIEN & (1<<BCERRE)) ? TRUE : FALSE) |
#define | Usb_ack_bconnection_error_interrupt() (OTGINT &= ~(1<<BCERRI)) |
acks B device connection error interrupt | |
#define | Is_usb_bconnection_error_interrupt() ((OTGINT & (1<<BCERRI)) ? TRUE : FALSE) |
tests if a B device connection error occurs | |
#define | Usb_enable_vbus_error_interrupt() (OTGIEN |= (1<<VBERRE)) |
enables VBus error interrupt | |
#define | Usb_disable_vbus_error_interrupt() (OTGIEN &= ~(1<<VBERRE)) |
disables VBus error interrupt | |
#define | Is_vbus_error_interrupt_enabled() ((OTGIEN & (1<<VBERRE)) ? TRUE : FALSE) |
#define | Usb_ack_vbus_error_interrupt() (OTGINT &= ~(1<<VBERRI)) |
acks VBus error interrupt | |
#define | Is_usb_vbus_error_interrupt() ((OTGINT & (1<<VBERRI)) ? TRUE : FALSE) |
tests if a VBus error occurs | |
#define | Usb_enable_srp_interrupt() (OTGIEN |= (1<<SRPE)) |
enables SRP interrupt | |
#define | Usb_disable_srp_interrupt() (OTGIEN &= ~(1<<SRPE)) |
disables SRP interrupt | |
#define | Is_srp_interrupt_enabled() ((OTGIEN & (1<<SRPE)) ? TRUE : FALSE) |
#define | Usb_ack_srp_interrupt() (OTGINT &= ~(1<<SRPI)) |
acks SRP interrupt | |
#define | Is_usb_srp_interrupt() ((OTGINT & (1<<SRPI)) ? TRUE : FALSE) |
tests if a SRP occurs | |
#define | Usb_initiate_remote_wake_up() (UDCON |= (1<<RMWKUP)) |
initiates a remote wake-up | |
#define | Usb_detach() (UDCON |= (1<<DETACH)) |
detaches from USB bus | |
#define | Usb_attach() (UDCON &= ~(1<<DETACH)) |
attaches to USB bus | |
#define | Is_usb_pending_remote_wake_up() ((UDCON & (1<<RMWKUP)) ? TRUE : FALSE) |
test if remote wake-up still running | |
#define | Is_usb_detached() ((UDCON & (1<<DETACH)) ? TRUE : FALSE) |
test if the device is detached | |
#define | Usb_get_device_interrupt() (UDINT & (1<<UDIEN)) |
returns the USB device interrupts (interrupt enabled) | |
#define | Usb_ack_all_device_interrupt() (UDINT = ~(1<<UDIEN)) |
acks the USB device interrupts (interrupt enabled) | |
#define | Usb_enable_remote_wake_up_interrupt() (UDIEN |= (1<<UPRSME)) |
enables remote wake-up interrupt | |
#define | Usb_disable_remote_wake_up_interrupt() (UDIEN &= ~(1<<UPRSME)) |
disables remote wake-up interrupt | |
#define | Is_remote_wake_up_interrupt_enabled() ((UDIEN & (1<<UPRSME)) ? TRUE : FALSE) |
#define | Usb_ack_remote_wake_up_start() (UDINT = ~(1<<UPRSMI)) |
acks remote wake-up | |
#define | Is_usb_remote_wake_up_start() ((UDINT & (1<<UPRSMI)) ? TRUE : FALSE) |
tests if remote wake-up still running | |
#define | Usb_enable_resume_interrupt() (UDIEN |= (1<<EORSME)) |
enables resume interrupt | |
#define | Usb_disable_resume_interrupt() (UDIEN &= ~(1<<EORSME)) |
disables resume interrupt | |
#define | Is_resume_interrupt_enabled() ((UDIEN & (1<<EORSME)) ? TRUE : FALSE) |
#define | Usb_ack_resume() (UDINT = ~(1<<EORSMI)) |
acks resume | |
#define | Is_usb_resume() ((UDINT & (1<<EORSMI)) ? TRUE : FALSE) |
tests if resume occurs | |
#define | Usb_enable_wake_up_interrupt() (UDIEN |= (1<<WAKEUPE)) |
enables wake-up interrupt | |
#define | Usb_disable_wake_up_interrupt() (UDIEN &= ~(1<<WAKEUPE)) |
disables wake-up interrupt | |
#define | Is_wake_up_interrupt_enabled() ((UDIEN & (1<<WAKEUPE)) ? TRUE : FALSE) |
#define | Usb_ack_wake_up() (UDINT = ~(1<<WAKEUPI)) |
acks wake-up | |
#define | Is_usb_wake_up() ((UDINT & (1<<WAKEUPI)) ? TRUE : FALSE) |
tests if wake-up occurs | |
#define | Usb_enable_reset_interrupt() (UDIEN |= (1<<EORSTE)) |
enables USB reset interrupt | |
#define | Usb_disable_reset_interrupt() (UDIEN &= ~(1<<EORSTE)) |
disables USB reset interrupt | |
#define | Is_reset_interrupt_enabled() ((UDIEN & (1<<EORSTE)) ? TRUE : FALSE) |
#define | Usb_ack_reset() (UDINT = ~(1<<EORSTI)) |
acks USB reset | |
#define | Is_usb_reset() ((UDINT & (1<<EORSTI)) ? TRUE : FALSE) |
tests if USB reset occurs | |
#define | Usb_enable_sof_interrupt() (UDIEN |= (1<<SOFE)) |
enables Start Of Frame Interrupt | |
#define | Usb_disable_sof_interrupt() (UDIEN &= ~(1<<SOFE)) |
disables Start Of Frame Interrupt | |
#define | Is_sof_interrupt_enabled() ((UDIEN & (1<<SOFE)) ? TRUE : FALSE) |
#define | Usb_ack_sof() (UDINT = ~(1<<SOFI)) |
acks Start Of Frame | |
#define | Is_usb_sof() ((UDINT & (1<<SOFI)) ? TRUE : FALSE) |
tests if Start Of Frame occurs | |
#define | Usb_enable_suspend_interrupt() (UDIEN |= (1<<SUSPE)) |
enables suspend state interrupt | |
#define | Usb_disable_suspend_interrupt() (UDIEN &= ~(1<<SUSPE)) |
disables suspend state interrupt | |
#define | Is_suspend_interrupt_enabled() ((UDIEN & (1<<SUSPE)) ? TRUE : FALSE) |
#define | Usb_ack_suspend() (UDINT = ~(1<<SUSPI)) |
acks Suspend | |
#define | Is_usb_suspend() ((UDINT & (1<<SUSPI)) ? TRUE : FALSE) |
tests if Suspend state detected | |
#define | Usb_enable_address() (UDADDR |= (1<<ADDEN)) |
enables USB device address | |
#define | Usb_disable_address() (UDADDR &= ~(1<<ADDEN)) |
disables USB device address | |
#define | Usb_configure_address(addr) (UDADDR = (UDADDR & (1<<ADDEN)) | ((U8)addr & MSK_UADD)) |
sets the USB device address | |
#define | Usb_frame_number() ((U16)((((U16)UDFNUMH) << 8) | ((U16)UDFNUML))) |
returns the last frame number | |
#define | Is_usb_frame_number_crc_error() ((UDMFN & (1<<FNCERR)) ? TRUE : FALSE) |
tests if a crc error occurs in frame number | |
#define | Usb_select_endpoint(ep) (UENUM = (U8)ep ) |
selects the endpoint number to interface with the CPU | |
#define | Usb_get_selected_endpoint() (UENUM ) |
get the currently selected endpoint number | |
#define | Usb_reset_endpoint(ep) (UERST = 1 << (U8)ep, UERST = 0) |
resets the selected endpoint | |
#define | Usb_enable_endpoint() (UECONX |= (1<<EPEN)) |
enables the current endpoint | |
#define | Usb_enable_stall_handshake() (UECONX |= (1<<STALLRQ)) |
enables the STALL handshake for the next transaction | |
#define | Usb_reset_data_toggle() (UECONX |= (1<<RSTDT)) |
resets the data toggle sequence | |
#define | Usb_disable_endpoint() (UECONX &= ~(1<<EPEN)) |
disables the current endpoint | |
#define | Usb_disable_stall_handshake() (UECONX |= (1<<STALLRQC)) |
disables the STALL handshake | |
#define | Usb_select_epnum_for_cpu() (UECONX &= ~(1<<EPNUMS)) |
selects endpoint interface on CPU | |
#define | Is_usb_endpoint_enabled() ((UECONX & (1<<EPEN)) ? TRUE : FALSE) |
tests if the current endpoint is enabled | |
#define | Is_usb_endpoint_disabled() ((UECONX & (1<<EPEN)) ? FALSE : TRUE) |
tests if the current endpoint is disabled | |
#define | Is_usb_endpoint_stall_requested() ((UECONX & (1<<STALLRQ)) ? TRUE : FALSE) |
tests if STALL handshake request is running | |
#define | Usb_configure_endpoint_type(type) (UECFG0X = (UECFG0X & ~(MSK_EPTYPE)) | ((U8)type << 6)) |
configures the current endpoint | |
#define | Usb_configure_endpoint_direction(dir) (UECFG0X = (UECFG0X & ~(1<<EPDIR)) | ((U8)dir)) |
configures the current endpoint direction | |
#define | Usb_configure_endpoint_size(size) (UECFG1X = (UECFG1X & ~MSK_EPSIZE) | ((U8)size << 4)) |
configures the current endpoint size | |
#define | Usb_configure_endpoint_bank(bank) (UECFG1X = (UECFG1X & ~MSK_EPBK) | ((U8)bank << 2)) |
configures the current endpoint number of banks | |
#define | Usb_allocate_memory() (UECFG1X |= (1<<ALLOC)) |
allocates the current configuration in DPRAM memory | |
#define | Usb_unallocate_memory() (UECFG1X &= ~(1<<ALLOC)) |
un-allocates the current configuration in DPRAM memory | |
#define | Usb_ack_overflow_interrupt() (UESTA0X &= ~(1<<OVERFI)) |
acks endpoint overflow interrupt | |
#define | Usb_ack_underflow_interrupt() (UESTA0X &= ~(1<<UNDERFI)) |
acks endpoint underflow memory | |
#define | Usb_ack_zlp() (UESTA0X &= ~(1<<ZLPSEEN)) |
acks Zero Length Packet received | |
#define | Usb_data_toggle() ((UESTA0X&MSK_DTSEQ) >> 2) |
returns data toggle | |
#define | Usb_nb_busy_bank() (UESTA0X & MSK_NBUSYBK) |
returns the number of busy banks | |
#define | Is_usb_one_bank_busy() ((UESTA0X & MSK_NBUSYBK) == 0 ? FALSE : TRUE) |
tests if at least one bank is busy | |
#define | Is_endpoint_configured() ((UESTA0X & (1<<CFGOK)) ? TRUE : FALSE) |
tests if current endpoint is configured | |
#define | Is_usb_overflow() ((UESTA0X & (1<<OVERFI)) ? TRUE : FALSE) |
tests if an overflows occurs | |
#define | Is_usb_underflow() ((UESTA0X & (1<<UNDERFI)) ? TRUE : FALSE) |
tests if an underflow occurs | |
#define | Is_usb_zlp() ((UESTA0X & (1<<ZLPSEEN)) ? TRUE : FALSE) |
tests if a ZLP has been detected | |
#define | Usb_control_direction() ((UESTA1X & (1<<CTRLDIR)) >> 2) |
returns the control direction | |
#define | Usb_current_bank() ( UESTA1X & MSK_CURRBK) |
returns the number of the current bank | |
#define | Usb_ack_fifocon() (UEINTX &= ~(1<<FIFOCON)) |
clears FIFOCON bit | |
#define | Usb_ack_nak_in() (UEINTX &= ~(1<<NAKINI)) |
acks NAK IN received | |
#define | Usb_ack_nak_out() (UEINTX &= ~(1<<NAKOUTI)) |
acks NAK OUT received | |
#define | Usb_ack_receive_setup() (UEINTX &= ~(1<<RXSTPI)) |
acks receive SETUP | |
#define | Usb_ack_receive_out() (UEINTX &= ~(1<<RXOUTI), Usb_ack_fifocon()) |
acks reveive OUT | |
#define | Usb_ack_stalled() (MSK_STALLEDI= 0) |
acks STALL sent | |
#define | Usb_ack_in_ready() (UEINTX &= ~(1<<TXINI), Usb_ack_fifocon()) |
acks IN ready | |
#define | Usb_kill_last_in_bank() (UENTTX |= (1<<RXOUTI)) |
Kills last bank. | |
#define | Is_usb_read_enabled() (UEINTX&(1<<RWAL)) |
tests if endpoint read allowed | |
#define | Is_usb_write_enabled() (UEINTX&(1<<RWAL)) |
tests if endpoint write allowed | |
#define | Is_usb_read_control_enabled() (UEINTX&(1<<TXINI)) |
tests if read allowed on control endpoint | |
#define | Is_usb_nak_in_sent() (UEINTX&(1<<NAKINI)) |
tests if a NAK has been sent on IN endpoint | |
#define | Is_usb_nak_out_sent() (UEINTX&(1<<NAKOUTI)) |
tests if a NAK has been sent on OUT endpoint | |
#define | Is_usb_receive_setup() (UEINTX&(1<<RXSTPI)) |
tests if SETUP received | |
#define | Is_usb_receive_out() (UEINTX&(1<<RXOUTI)) |
tests if OUT received | |
#define | Is_usb_in_ready() (UEINTX&(1<<TXINI)) |
tests if IN ready | |
#define | Usb_send_in() (UEINTX &= ~(1<<FIFOCON)) |
sends IN | |
#define | Usb_send_control_in() (UEINTX &= ~(1<<TXINI)) |
sends IN on control endpoint | |
#define | Usb_free_out_bank() (UEINTX &= ~(1<<FIFOCON)) |
frees OUT bank | |
#define | Usb_ack_control_out() (UEINTX &= ~(1<<RXOUTI)) |
acks OUT on control endpoint | |
#define | Usb_enable_flow_error_interrupt() (UEIENX |= (1<<FLERRE)) |
enables flow error interrupt | |
#define | Usb_enable_nak_in_interrupt() (UEIENX |= (1<<NAKINE)) |
enables NAK IN interrupt | |
#define | Usb_enable_nak_out_interrupt() (UEIENX |= (1<<NAKOUTE)) |
enables NAK OUT interrupt | |
#define | Usb_enable_receive_setup_interrupt() (UEIENX |= (1<<RXSTPE)) |
enables receive SETUP interrupt | |
#define | Usb_enable_receive_out_interrupt() (UEIENX |= (1<<RXOUTE)) |
enables receive OUT interrupt | |
#define | Usb_enable_stalled_interrupt() (UEIENX |= (1<<STALLEDE)) |
enables STALL sent interrupt | |
#define | Usb_enable_in_ready_interrupt() (UEIENX |= (1<<TXINE)) |
enables IN ready interrupt | |
#define | Usb_disable_flow_error_interrupt() (UEIENX &= ~(1<<FLERRE)) |
disables flow error interrupt | |
#define | Usb_disable_nak_in_interrupt() (UEIENX &= ~(1<<NAKINE)) |
disables NAK IN interrupt | |
#define | Usb_disable_nak_out_interrupt() (UEIENX &= ~(1<<NAKOUTE)) |
disables NAK OUT interrupt | |
#define | Usb_disable_receive_setup_interrupt() (UEIENX &= ~(1<<RXSTPE)) |
disables receive SETUP interrupt | |
#define | Usb_disable_receive_out_interrupt() (UEIENX &= ~(1<<RXOUTE)) |
disables receive OUT interrupt | |
#define | Usb_disable_stalled_interrupt() (UEIENX &= ~(1<<STALLEDE)) |
disables STALL sent interrupt | |
#define | Usb_disable_in_ready_interrupt() (UEIENX &= ~(1<<TXINE)) |
disables IN ready interrupt | |
#define | Usb_read_byte() (UEDATX) |
returns FIFO byte for current endpoint | |
#define | Usb_write_byte(byte) (UEDATX = (U8)byte) |
writes byte in FIFO for current endpoint | |
#define | Usb_byte_counter() ((((U16)UEBCHX) << 8) | (UEBCLX)) |
returns number of bytes in FIFO current endpoint (16 bits) | |
#define | Usb_byte_counter_8() ((U8)UEBCLX) |
returns number of bytes in FIFO current endpoint (8 bits) | |
#define | Usb_interrupt_flags() (UEINT) |
tests the general endpoint interrupt flags | |
#define | Is_usb_endpoint_event() (Usb_interrupt_flags() != 0x00) |
tests the general endpoint interrupt flags | |
#define | Host_allocate_memory() (UPCFG1X |= (1<<ALLOC)) |
allocates the current configuration in DPRAM memory | |
#define | Host_unallocate_memory() (UPCFG1X &= ~(1<<ALLOC)) |
un-allocates the current configuration in DPRAM memory | |
#define | Is_host_pipe_memory_allocated() (UPCFG1X & (1<<ALLOC) ? TRUE : FALSE) |
Check if pipe memory is allocated. | |
#define | Host_enable() (USBCON |= (1<<HOST)) |
enables USB Host function | |
#define | SOFEN 0 |
#define | Host_enable_sof() (UHCON |= (1<<SOFEN)) |
enables SOF generation | |
#define | Host_disable_sof() (UHCON &= ~(1<<SOFEN)) |
disables SOF generation | |
#define | Host_send_reset() (UHCON |= (1<<RESET)) |
sends a USB Reset to the device | |
#define | Host_is_reset() ((UHCON & (1<<RESET)) ? TRUE : FALSE) |
tests if USB Reset running | |
#define | Host_send_resume() (UHCON |= (1<<RESUME)) |
sends a USB Resume to the device | |
#define | Host_is_resume() ((UHCON & (1<<RESUME)) ? TRUE : FALSE) |
tests if USB Resume running | |
#define | Host_enable_sof_interrupt() (UHIEN |= (1<<HSOFE)) |
enables host start of frame interrupt | |
#define | Host_disable_sof_interrupt() (UHIEN &= ~(1<<HSOFE)) |
enables host start of frame interrupt | |
#define | Is_host_sof_interrupt_enabled() ((UHIEN & (1<<HSOFE)) ? TRUE : FALSE) |
#define | Host_is_sof() ((UHINT & (1<<HSOFI)) ? TRUE : FALSE) |
tests if SOF detected | |
#define | Is_host_sof() ((UHINT & (1<<HSOFI)) ? TRUE : FALSE) |
#define | Host_ack_sof() (UHINT &= ~(1<<HSOFI)) |
#define | Host_enable_hwup_interrupt() (UHIEN |= (1<<HWUPE)) |
enables host wake up interrupt detection | |
#define | Host_disable_hwup_interrupt() (UHIEN &= ~(1<<HWUPE)) |
disables host wake up interrupt detection | |
#define | Is_host_hwup_interrupt_enabled() ((UHIEN & (1<<HWUPE)) ? TRUE : FALSE) |
#define | Host_is_hwup() ((UHINT & (1<<HWUPI)) ? TRUE : FALSE) |
tests if host wake up detected | |
#define | Is_host_hwup() ((UHINT & (1<<HWUPI)) ? TRUE : FALSE) |
Ack host wake up detection. | |
#define | Host_ack_hwup() (UHINT &= ~(1<<HWUPI)) |
#define | Host_enable_down_stream_resume_interrupt() (UHIEN |= (1<<RSMEDE)) |
enables host down stream rsm sent interrupt detection | |
#define | Host_disable_down_stream_resume_interrupt() (UHIEN &= ~(1<<RSMEDE)) |
disables host down stream rsm sent interrupt detection | |
#define | Is_host_down_stream_resume_interrupt_enabled() ((UHIEN & (1<<RSMEDE)) ? TRUE : FALSE) |
#define | Is_host_down_stream_resume() ((UHINT & (1<<RSMEDI)) ? TRUE : FALSE) |
Ack host down stream resume sent. | |
#define | Host_ack_down_stream_resume() (UHINT &= ~(1<<RSMEDI)) |
#define | Host_enable_remote_wakeup_interrupt() (UHIEN |= (1<<RXRSME)) |
enables host remote wake up interrupt detection | |
#define | Host_disable_remote_wakeup_interrupt() (UHIEN &= ~(1<<RXRSME)) |
disables host remote wake up interrupt detection | |
#define | Is_host_remote_wakeup_interrupt_enabled() ((UHIEN & (1<<RXRSME)) ? TRUE : FALSE) |
#define | Host_is_remote_wakeup() ((UHINT & (1<<RXRSMI)) ? TRUE : FALSE) |
tests if host wake up detected | |
#define | Is_host_remote_wakeup() ((UHINT & (1<<RXRSMI)) ? TRUE : FALSE) |
Ack host wake up detection. | |
#define | Host_ack_remote_wakeup() (UHINT &= ~(1<<RXRSMI)) |
#define | Host_enable_device_connection_interrupt() (UHIEN |= (1<<DCONNE)) |
enables host device connection interrupt | |
#define | Host_disable_device_connection_interrupt() (UHIEN &= ~(1<<DCONNE)) |
disables USB device connection interrupt | |
#define | Is_host_device_connection_interrupt_enabled() ((UHIEN & (1<<DCONNE)) ? TRUE : FALSE) |
#define | Is_device_connection() (UHINT & (1<<DCONNI)) |
tests if a USB device has been detected | |
#define | Host_ack_device_connection() (UHINT = ~(1<<DCONNI)) |
acks device connection | |
#define | Host_enable_device_disconnection_interrupt() (UHIEN |= (1<<DDISCE)) |
enables host device disconnection interrupt | |
#define | Host_disable_device_disconnection_interrupt() (UHIEN &= ~(1<<DDISCE)) |
disables USB device connection interrupt | |
#define | Is_host_device_disconnection_interrupt_enabled() ((UHIEN & (1<<DDISCE)) ? TRUE : FALSE) |
#define | Is_device_disconnection() (UHINT & (1<<DDISCI) ? TRUE : FALSE) |
tests if a USB device has been removed | |
#define | Host_ack_device_disconnection() (UHINT = ~(1<<DDISCI)) |
acks device disconnection | |
#define | Host_enable_reset_interrupt() (UHIEN |= (1<<RSTE)) |
enables host USB reset interrupt | |
#define | Host_disable_reset_interrupt() (UHIEN &= ~(1<<RSTE)) |
disables host USB reset interrupt | |
#define | Is_host_reset_interrupt_enabled() ((UHIEN & (1<<RSTE)) ? TRUE : FALSE) |
#define | Host_ack_reset() (UHINT = ~(1<<RSTI)) |
acks host USB reset sent | |
#define | Is_host_reset() Host_is_reset() |
tests if USB reset has been sent | |
#define | Host_vbus_request() (OTGCON |= (1<<VBUSREQ)) |
switches on VBus | |
#define | Host_clear_vbus_request() (OTGCON |= (1<<VBUSRQC)) |
switches off VBus | |
#define | Host_configure_address(addr) (UHADDR = addr & MSK_HADDR) |
configures the address to use for the device | |
#define | Is_host_full_speed() ((USBSTA & (1<<SPEED)) ? TRUE : FALSE) |
Get connected device speed, returns TRUE when in full speed mode. | |
#define | Host_select_pipe(p) (UPNUM = (U8)p) |
selects pipe for CPU interface | |
#define | Host_get_selected_pipe() (UPNUM ) |
get the currently selected pipe number | |
#define | Host_enable_pipe() (UPCONX |= (1<<PEN)) |
enables pipe | |
#define | Host_disable_pipe() (UPCONX &= ~(1<<PEN)) |
disables pipe | |
#define | Host_set_token_setup() (UPCFG0X = UPCFG0X & ~MSK_TOKEN_SETUP) |
sets SETUP token | |
#define | Host_set_token_in() (UPCFG0X = (UPCFG0X & ~MSK_TOKEN_SETUP) | MSK_TOKEN_IN) |
sets IN token | |
#define | Host_set_token_out() (UPCFG0X = (UPCFG0X & ~MSK_TOKEN_SETUP) | MSK_TOKEN_OUT) |
sets OUT token | |
#define | Host_get_endpoint_number() (UPCFG0X & (MSK_PEPNUM)) |
returns the number of the endpoint associated to the current pipe | |
#define | Host_get_pipe_interrupt() (UPINT) |
returns pipe interrupt register | |
#define | Host_set_interrupt_frequency(frq) (UPCFG2X = (U8)frq) |
sets the interrupt frequency | |
#define | Is_pipe_configured() (UPSTAX & (1<<CFGOK)) |
tests if current pipe is configured | |
#define | Is_host_one_bank_busy() ((UPSTAX & MSK_NBUSYBK) != 0) |
tests if at least one bank is busy | |
#define | Host_number_of_busy_bank() (UPSTAX & MSK_NBUSYBK) |
returns the number of busy banks | |
#define | Host_reset_pipe(p) (UPRST = 1<<p , UPRST = 0) |
resets the pipe | |
#define | Host_write_byte(dat) (UPDATX = dat) |
writes a byte into the pipe FIFO | |
#define | Host_read_byte() (UPDATX) |
reads a byte from the pipe FIFO | |
#define | Host_freeze_pipe() (UPCONX |= (1<<PFREEZE)) |
freezes the pipe | |
#define | Host_unfreeze_pipe() (UPCONX &= ~(1<<PFREEZE)) |
un-freezees the pipe | |
#define | Is_host_pipe_freeze() (UPCONX & (1<<PFREEZE)) |
tests if the current pipe is frozen | |
#define | Host_reset_pipe_data_toggle() (UPCONX |= (1<<RSTDT) ) |
resets data toggle | |
#define | Is_host_setup_sent() ((UPINTX & (1<<TXSTPI)) ? TRUE : FALSE) |
tests if SETUP has been sent | |
#define | Is_host_control_in_received() ((UPINTX & (1<<RXINI)) ? TRUE : FALSE) |
tests if control IN has been received | |
#define | Is_host_control_out_sent() ((UPINTX & (1<<TXOUTI)) ? TRUE : FALSE) |
tests if control OUT has been sent | |
#define | Is_host_stall() ((UPINTX & (1<<RXSTALLI)) ? TRUE : FALSE) |
tests if a STALL has been received | |
#define | Is_host_pipe_error() ((UPINTX & (1<<PERRI)) ? TRUE : FALSE) |
tests if an error occurs on current pipe | |
#define | Host_send_setup() (UPINTX &= ~(1<<FIFOCON)) |
sends a setup | |
#define | Host_send_control_in() (UPINTX &= ~(1<<FIFOCON)) |
sends a control IN | |
#define | Host_send_control_out() (UPINTX &= ~(1<<FIFOCON)) |
sends a control OUT | |
#define | Host_ack_control_out() (UPINTX &= ~(1<<TXOUTI)) |
acks control OUT | |
#define | Host_ack_control_in() (UPINTX &= ~(1<<RXINI)) |
acks control IN | |
#define | Host_ack_setup() (UPINTX &= ~(1<<TXSTPI)) |
acks setup | |
#define | Host_ack_stall() (UPINTX &= ~(1<<RXSTALLI)) |
acks STALL reception | |
#define | Host_send_out() (UPINTX &= ~(1<<FIFOCON)) |
sends a OUT | |
#define | Is_host_out_sent() ((UPINTX & (1<<TXOUTI)) ? TRUE : FALSE) |
tests if OUT has been sent | |
#define | Host_ack_out_sent() (UPINTX &= ~(1<<TXOUTI)) |
acks OUT sent | |
#define | Is_host_in_received() ((UPINTX & (1<<RXINI)) ? TRUE : FALSE) |
tests if IN received | |
#define | Host_ack_in_received() (UPINTX &= ~(1<<RXINI)) |
acks IN reception | |
#define | Host_send_in() (UPINTX &= ~(1<<FIFOCON)) |
sends a IN | |
#define | Is_host_nak_received() ((UPINTX & (1<<NAKEDI)) ? TRUE : FALSE) |
tests if nak handshake has been received | |
#define | Host_ack_nak_received() (UPINTX &= ~(1<<NAKEDI)) |
acks NAk received sent | |
#define | Is_host_read_enabled() (UPINTX&(1<<RWAL)) |
tests if endpoint read allowed | |
#define | Is_host_write_enabled() (UPINTX&(1<<RWAL)) |
tests if endpoint read allowed | |
#define | Host_standard_in_mode() (UPCONX &= ~(1<<INMODE)) |
sets IN in standard mode | |
#define | Host_continuous_in_mode() (UPCONX |= (1<<INMODE)) |
sets IN in continuous mode | |
#define | Host_in_request_number(in_num) (UPINRQX = (U8)in_num) |
sets number of IN requests to perform before freeze | |
#define | Host_get_in_request_number() (UPINRQX) |
returns number of remaining IN requests | |
#define | Host_data_length_U8() (UPBCLX) |
returns number of bytes (8 bits) | |
#define | Host_data_length_U16() ((((U16)UPBCHX)<<8) | UPBCLX) |
returns number of bytes (16 bits) | |
#define | Host_byte_counter() Host_data_length_U16() |
for device compatibility | |
#define | Host_byte_counter_8() Host_data_length_U8() |
for device compatibility | |
#define | Host_get_pipe_length() ((U16)0x08 << ((UPCFG1X & MSK_PSIZE)>>4)) |
returns the size of the current pipe | |
#define | Host_get_pipe_type() (UPCFG0X>>6) |
returns the type of the current pipe | |
#define | Host_error_status() (UPERRX & MSK_ERROR) |
tests if error occurs on pipe | |
#define | Host_ack_all_errors() (UPERRX = 0x00) |
acks all pipe error | |
#define | Host_enable_transmit_interrupt() (UPIENX |= (1<<TXOUTE)) |
Enable pipe end transmission interrupt. | |
#define | Host_disable_transmit_interrupt() (UPIENX &= ~(1<<TXOUTE)) |
Disable pipe end transmission interrupt. | |
#define | Host_enable_receive_interrupt() (UPIENX |= (1<<RXINE)) |
Enable pipe reception interrupt. | |
#define | Host_disable_receive_interrupt() (UPIENX &= ~(1<<RXINE)) |
Disable pipe recption interrupt. | |
#define | Host_enable_stall_interrupt() (UPIENX |= (1<<RXSTALLE)) |
Enable pipe stall interrupt. | |
#define | Host_disable_stall_interrupt() (UPIENX &= ~(1<<RXSTALLE)) |
Disable pipe stall interrupt. | |
#define | Host_enable_error_interrupt() (UPIENX |= (1<<PERRE)) |
Enable pipe error interrupt. | |
#define | Host_disable_error_interrupt() (UPIENX &= ~(1<<PERRE)) |
Disable pipe error interrupt. | |
#define | Host_enable_nak_interrupt() (UPIENX |= (1<<NAKEDE)) |
Enable pipe NAK interrupt. | |
#define | Host_disable_nak_interrupt() (UPIENX &= ~(1<<NAKEDE)) |
Disable pipe NAK interrupt. | |
#define | Get_pipe_token(x) ((x & (0x80)) ? TOKEN_IN : TOKEN_OUT) |
#define | wSWAP(x) |
wSWAP This macro swaps the U8 order in words. | |
#define | Usb_write_word_enum_struc(x) (wSWAP(x)) |
Usb_write_word_enum_struc This macro help to fill the U16 fill in USB enumeration struct. | |
Typedefs | |
typedef enum endpoint_parameter | t_endpoint_parameter |
Enumerations | |
enum | endpoint_parameter { ep_num, ep_type, ep_direction, ep_size, ep_bank, nyet_status } |
Functions | |
U8 | usb_config_ep (U8, U8) |
usb_configure_endpoint. | |
U8 | usb_select_enpoint_interrupt (void) |
usb_select_endpoint_interrupt. | |
U16 | usb_get_nb_byte_epw (void) |
U8 | usb_send_packet (U8, U8 *, U8) |
usb_send_packet. | |
U8 | usb_read_packet (U8, U8 *, U8) |
usb_read_packet. | |
void | usb_halt_endpoint (U8) |
usb_halt_endpoint. | |
void | usb_reset_endpoint (U8) |
U8 | usb_init_device (void) |
usb_init_device. | |
U8 | host_config_pipe (U8, U8) |
--------------------------------------------------------- ------------------ HOST --------------------------------- --------------------------------------------------------- | |
U8 | host_determine_pipe_size (U16) |
host_determine_pipe_size. | |
void | host_disable_all_pipe (void) |
host_disable_all_pipe. | |
U8 | usb_get_nb_pipe_interrupt (void) |
Definition in file usb_drv.h.
typedef enum endpoint_parameter t_endpoint_parameter |
enum endpoint_parameter |
Definition at line 51 of file usb_drv.h.
00051 {ep_num, ep_type, ep_direction, ep_size, ep_bank, nyet_status} t_endpoint_parameter;
usb_configure_endpoint.
This function configures an endpoint with the selected type.
config0 | ||
config1 |
Definition at line 70 of file usb_drv.c.
References Is_endpoint_configured, Usb_allocate_memory, and Usb_enable_endpoint.
00071 { 00072 Usb_enable_endpoint(); 00073 UECFG0X = config0; 00074 UECFG1X = (UECFG1X & (1<<ALLOC)) | config1; 00075 Usb_allocate_memory(); 00076 return (Is_endpoint_configured()); 00077 }
U8 usb_select_enpoint_interrupt | ( | void | ) |
usb_select_endpoint_interrupt.
This function select the endpoint where an event occurs and returns the number of this endpoint. If no event occurs on the endpoints, this function returns 0.
none |
Definition at line 90 of file usb_drv.c.
References ep_num, MAX_EP_NB, and Usb_interrupt_flags.
00091 { 00092 U8 interrupt_flags; 00093 U8 ep_num; 00094 00095 ep_num = 0; 00096 interrupt_flags = Usb_interrupt_flags(); 00097 00098 while(ep_num < MAX_EP_NB) 00099 { 00100 if (interrupt_flags & 1) 00101 { 00102 return (ep_num); 00103 } 00104 else 00105 { 00106 ep_num++; 00107 interrupt_flags = interrupt_flags >> 1; 00108 } 00109 } 00110 return 0; 00111 }
U16 usb_get_nb_byte_epw | ( | void | ) |
usb_send_packet.
This function moves the data pointed by tbuf to the selected endpoint fifo and sends it through the USB.
ep_num | number of the addressed endpoint | |
*tbuf | address of the first data to send | |
data_length | number of bytes to send |
Note: tbuf is incremented of 'data_length'.
Definition at line 133 of file usb_drv.c.
References Is_usb_write_enabled, Usb_select_endpoint, and Usb_write_byte.
00134 { 00135 U8 remaining_length; 00136 00137 remaining_length = data_length; 00138 Usb_select_endpoint(ep_num); 00139 while(Is_usb_write_enabled() && (0 != remaining_length)) 00140 { 00141 Usb_write_byte(*tbuf); 00142 remaining_length--; 00143 tbuf++; 00144 } 00145 return remaining_length; 00146 }
usb_read_packet.
This function moves the data stored in the selected endpoint fifo to the address specified by *rbuf.
ep_num | number of the addressed endpoint | |
*rbuf | aaddress of the first data to write with the USB data | |
data_length | number of bytes to read |
Note: rbuf is incremented of 'data_length'.
Definition at line 168 of file usb_drv.c.
References Is_usb_read_enabled, Usb_read_byte, and Usb_select_endpoint.
00169 { 00170 U8 remaining_length; 00171 00172 remaining_length = data_length; 00173 Usb_select_endpoint(ep_num); 00174 00175 while(Is_usb_read_enabled() && (0 != remaining_length)) 00176 { 00177 *rbuf = Usb_read_byte(); 00178 remaining_length--; 00179 rbuf++; 00180 } 00181 return remaining_length; 00182 }
void usb_halt_endpoint | ( | U8 | ep_num | ) |
usb_halt_endpoint.
This function sends a STALL handshake for the next Host request. A STALL handshake will be send for each next request untill a SETUP or a Clear Halt Feature occurs for this endpoint.
ep_num | number of the addressed endpoint |
Definition at line 194 of file usb_drv.c.
References Usb_enable_stall_handshake, and Usb_select_endpoint.
00195 { 00196 Usb_select_endpoint(ep_num); 00197 Usb_enable_stall_handshake(); 00198 }
void usb_reset_endpoint | ( | U8 | ) |
U8 usb_init_device | ( | void | ) |
usb_init_device.
This function initializes the USB device controller and configures the Default Control Endpoint.
none |
Definition at line 210 of file usb_drv.c.
References DIRECTION_OUT, EP_CONTROL, FALSE, Is_usb_endpoint_enabled, Is_usb_id_device, NYET_DISABLED, ONE_BANK, SIZE_64, SIZE_8, TYPE_CONTROL, usb_configure_endpoint, Usb_select_device, and Usb_select_endpoint.
00211 { 00212 Usb_select_device(); 00213 if(Is_usb_id_device()) 00214 { 00215 Usb_select_endpoint(EP_CONTROL); 00216 if(!Is_usb_endpoint_enabled()) 00217 { 00218 #if (USB_LOW_SPEED_DEVICE==DISABLE) 00219 return usb_configure_endpoint(EP_CONTROL, \ 00220 TYPE_CONTROL, \ 00221 DIRECTION_OUT, \ 00222 SIZE_64, \ 00223 ONE_BANK, \ 00224 NYET_DISABLED); 00225 #else 00226 return usb_configure_endpoint(EP_CONTROL, \ 00227 TYPE_CONTROL, \ 00228 DIRECTION_OUT, \ 00229 SIZE_8, \ 00230 ONE_BANK, \ 00231 NYET_DISABLED); 00232 #endif 00233 } 00234 } 00235 return FALSE; 00236 }
--------------------------------------------------------- ------------------ HOST --------------------------------- ---------------------------------------------------------
usb_configure_pipe.
This function configures a pipe with the selected type.
config0 | ||
config1 |
Definition at line 255 of file usb_drv.c.
References Host_allocate_memory, Host_enable_pipe, and Is_pipe_configured.
00256 { 00257 Host_enable_pipe(); 00258 UPCFG0X = config0; 00259 UPCFG1X = config1; 00260 Host_allocate_memory(); 00261 return (Is_pipe_configured()); 00262 }
host_determine_pipe_size.
This function returns the size configuration register value according to the endpint size detected inthe device enumeration process.
Definition at line 271 of file usb_drv.c.
References SIZE_1024, SIZE_128, SIZE_16, SIZE_256, SIZE_32, SIZE_512, SIZE_64, and SIZE_8.
00272 { 00273 if(size <= 8 ) {return (SIZE_8 );} 00274 else if(size <= 16 ) {return (SIZE_16 );} 00275 else if(size <= 32 ) {return (SIZE_32 );} 00276 else if(size <= 64 ) {return (SIZE_64 );} 00277 else if(size <= 128) {return (SIZE_128 );} 00278 else if(size <= 256) {return (SIZE_256 );} 00279 else if(size <= 512) {return (SIZE_512 );} 00280 else {return (SIZE_1024);} 00281 00282 }
void host_disable_all_pipe | ( | void | ) |
host_disable_all_pipe.
This function disable all pipes for the host controller Usefull to execute upon device disconnection.
Definition at line 291 of file usb_drv.c.
References Host_disable_pipe, Host_reset_pipe, Host_select_pipe, and Host_unallocate_memory.
00292 { 00293 U8 i; 00294 for (i=0;i<7;i++) 00295 { 00296 Host_reset_pipe(i); 00297 Host_select_pipe(i); 00298 Host_unallocate_memory(); 00299 Host_disable_pipe(); 00300 } 00301 }
U8 usb_get_nb_pipe_interrupt | ( | void | ) |
Returns the pipe number that generates a USB communication interrupt This function sould be called only when an interrupt has been detected. Otherwize the return value is incorect
none |
Definition at line 312 of file usb_drv.c.
References Host_get_pipe_interrupt, and MAX_EP_NB.
00313 { 00314 U8 interrupt_flags; 00315 U8 i; 00316 00317 interrupt_flags = Host_get_pipe_interrupt(); 00318 for(i=0;i< MAX_EP_NB;i++) 00319 { 00320 if (interrupt_flags & (1<<i)) 00321 { 00322 return (i); 00323 } 00324 } 00325 // This return should never occurs .... 00326 return MAX_EP_NB+1; 00327 }