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00045 #ifndef _USB_DRV_H_
00046 #define _USB_DRV_H_
00047
00048
00049
00050
00051 typedef enum endpoint_parameter{ep_num, ep_type, ep_direction, ep_size, ep_bank, nyet_status} t_endpoint_parameter;
00052
00056
00057
00058
00059 #define MAX_EP_NB 7
00060
00061 #define EP_CONTROL 0
00062 #define EP_1 1
00063 #define EP_2 2
00064 #define EP_3 3
00065 #define EP_4 4
00066 #define EP_5 5
00067 #define EP_6 6
00068 #define EP_7 7
00069
00070 #define PIPE_CONTROL 0
00071 #define PIPE_0 0
00072 #define PIPE_1 1
00073 #define PIPE_2 2
00074 #define PIPE_3 3
00075 #define PIPE_4 4
00076 #define PIPE_5 5
00077 #define PIPE_6 6
00078 #define PIPE_7 7
00079
00080
00081 #define MSK_EP_DIR 0x7F
00082 #define MSK_UADD 0x7F
00083 #define MSK_EPTYPE 0xC0
00084 #define MSK_EPSIZE 0x70
00085 #define MSK_EPBK 0x0C
00086 #define MSK_DTSEQ 0x0C
00087 #define MSK_NBUSYBK 0x03
00088 #define MSK_CURRBK 0x03
00089 #define MSK_DAT 0xFF // UEDATX
00090 #define MSK_BYCTH 0x07 // UEBCHX
00091 #define MSK_BYCTL 0xFF // UEBCLX
00092 #define MSK_EPINT 0x7F // UEINT
00093 #define MSK_HADDR 0xFF // UHADDR
00094
00095
00096 #define MSK_PNUM 0x07 // UPNUM
00097 #define MSK_PRST 0x7F // UPRST
00098 #define MSK_PTYPE 0xC0 // UPCFG0X
00099 #define MSK_PTOKEN 0x30
00100 #define MSK_PEPNUM 0x0F
00101 #define MSK_PSIZE 0x70 // UPCFG1X
00102 #define MSK_PBK 0x0C
00103
00104 #define MSK_NBUSYBK 0x03
00105
00106 #define MSK_ERROR 0x1F
00107
00108 #define MSK_PTYPE 0xC0 // UPCFG0X
00109 #define MSK_PTOKEN 0x30
00110 #define MSK_TOKEN_SETUP 0x30
00111 #define MSK_TOKEN_IN 0x10
00112 #define MSK_TOKEN_OUT 0x20
00113 #define MSK_PEPNUM 0x0F
00114
00115 #define MSK_PSIZE 0x70 // UPCFG1X
00116 #define MSK_PBK 0x0C
00117
00118
00119
00120
00121 #define TYPE_CONTROL 0
00122 #define TYPE_ISOCHRONOUS 1
00123 #define TYPE_BULK 2
00124 #define TYPE_INTERRUPT 3
00125
00126
00127 #define DIRECTION_OUT 0
00128 #define DIRECTION_IN 1
00129
00130
00131 #define SIZE_8 0
00132 #define SIZE_16 1
00133 #define SIZE_32 2
00134 #define SIZE_64 3
00135 #define SIZE_128 4
00136 #define SIZE_256 5
00137 #define SIZE_512 6
00138 #define SIZE_1024 7
00139
00140
00141
00142 #define ONE_BANK 0
00143 #define TWO_BANKS 1
00144
00145
00146 #define NYET_ENABLED 0
00147 #define NYET_DISABLED 1
00148
00149
00150 #define TOKEN_SETUP 0
00151 #define TOKEN_IN 1
00152 #define TOKEN_OUT 2
00153
00154 #define Is_ep_addr_in(x) ( (x&USB_ENDPOINT_DIR_MASK)? TRUE : FALSE)
00155
00156
00160 #define Usb_build_ep_config0(type, dir, nyet) ((type<<6) | (nyet<<1) | (dir))
00161 #define Usb_build_ep_config1(size, bank ) ((size<<4) | (bank<<2) )
00162 #define usb_configure_endpoint(num, type, dir, size, bank, nyet) \
00163 ( Usb_select_endpoint(num), \
00164 usb_config_ep(Usb_build_ep_config0(type, dir, nyet),\
00165 Usb_build_ep_config1(size, bank) ))
00166
00167 #define Host_build_pipe_config0(type, token, ep_num) ((type<<6) | (token<<4) | (ep_num))
00168 #define Host_build_pipe_config1(size, bank ) ((size<<4) | (bank<<2) )
00169 #define host_configure_pipe(num, type, token,ep_num, size, bank, freq) \
00170 ( Host_select_pipe(num), \
00171 Host_set_interrupt_frequency(freq), \
00172 host_config_pipe(Host_build_pipe_config0(type, token, ep_num),\
00173 Host_build_pipe_config1(size, bank) ))
00175
00180 #define Usb_enable_regulator() (UHWCON |= (1<<UVREGE))
00182 #define Usb_disable_regulator() (UHWCON &= ~(1<<UVREGE))
00184 #define Is_usb_regulator_enabled() ((UHWCON & (1<<UVREGE)) ? TRUE : FALSE)
00186
00190
00192 #define Usb_enable() (USBCON |= ((1<<USBE) ))
00194 #define Usb_disable() (USBCON &= ~((1<<USBE)))
00196 #define Usb_full_speed_mode() (UDCON &= ~(1<<LSM))
00198 #define Usb_low_speed_mode() (UDCON |= (1<<LSM))
00199
00200 #define Is_usb_enabled() ((USBCON & (1<<USBE)) ? TRUE : FALSE)
00201
00202 #define Usb_enable_device() (USBCON |= (1<<USBE))
00203 #define Usb_disable_device() (USBCON &= ~(1<<USBE))
00204 #define Usb_reset_macro_only() (UDCON &= ~(1<<RSTCPU))
00205 #define Usb_reset_all_system() (UDCON |= (1<<RSTCPU))
00206
00208 #define Usb_enable_vbus_pad() (USBCON |= (1<<OTGPADE))
00210 #define Usb_disable_vbus_pad() (USBCON &= ~(1<<OTGPADE))
00211
00213 #define Usb_freeze_clock() (USBCON |= (1<<FRZCLK))
00214 #define Usb_unfreeze_clock() (USBCON &= ~(1<<FRZCLK))
00215 #define Is_usb_clock_freezed() ((USBCON & (1<<FRZCLK)) ? TRUE : FALSE)
00216
00217
00218 #define MSK_IDTE_VBUSTE ((1<<IDTE)|(1<<VBUSTE))
00220 #define Usb_get_general_interrupt() (USBINT & (USBCON & MSK_IDTE_VBUSTE))
00222 #define Usb_ack_all_general_interrupt() (USBINT = ~(USBCON & MSK_IDTE_VBUSTE))
00223 #define Usb_ack_cache_id_transition(x) ((x) &= ~(1<<IDTI))
00224 #define Usb_ack_cache_vbus_transition(x) ((x) &= ~(1<<VBUSTI))
00225 #define Is_usb_cache_id_transition(x) (((x) & (1<<IDTI)) )
00226 #define Is_usb_cache_vbus_transition(x) (((x) & (1<<VBUSTI)))
00227
00228 #define Usb_enable_vbus_interrupt() (USBCON |= (1<<VBUSTE))
00229 #define Usb_disable_vbus_interrupt() (USBCON &= ~(1<<VBUSTE))
00230 #define Is_usb_vbus_interrupt_enabled() ((USBCON & (1<<VBUSTE)) ? TRUE : FALSE)
00231 #define Is_usb_vbus_high() ((USBSTA & (1<<VBUS)) ? TRUE : FALSE)
00232 #define Is_usb_vbus_low() ((USBSTA & (1<<VBUS)) ? FALSE : TRUE)
00233 #define Usb_ack_vbus_transition() (USBINT = ~(1<<VBUSTI))
00234 #define Is_usb_vbus_transition() ((USBINT & (1<<VBUSTI)) ? TRUE : FALSE)
00236
00237
00242 #define Usb_initiate_remote_wake_up() (UDCON |= (1<<RMWKUP))
00244 #define Usb_detach() (UDCON |= (1<<DETACH))
00246 #define Usb_attach() (UDCON &= ~(1<<DETACH))
00248 #define Is_usb_pending_remote_wake_up() ((UDCON & (1<<RMWKUP)) ? TRUE : FALSE)
00250 #define Is_usb_detached() ((UDCON & (1<<DETACH)) ? TRUE : FALSE)
00251
00253 #define Usb_get_device_interrupt() (UDINT & (1<<UDIEN))
00255 #define Usb_ack_all_device_interrupt() (UDINT = ~(1<<UDIEN))
00256
00258 #define Usb_enable_remote_wake_up_interrupt() (UDIEN |= (1<<UPRSME))
00260 #define Usb_disable_remote_wake_up_interrupt() (UDIEN &= ~(1<<UPRSME))
00261 #define Is_remote_wake_up_interrupt_enabled() ((UDIEN & (1<<UPRSME)) ? TRUE : FALSE)
00263 #define Usb_ack_remote_wake_up_start() (UDINT = ~(1<<UPRSMI))
00265 #define Is_usb_remote_wake_up_start() ((UDINT & (1<<UPRSMI)) ? TRUE : FALSE)
00266
00268 #define Usb_enable_resume_interrupt() (UDIEN |= (1<<EORSME))
00270 #define Usb_disable_resume_interrupt() (UDIEN &= ~(1<<EORSME))
00271 #define Is_resume_interrupt_enabled() ((UDIEN & (1<<EORSME)) ? TRUE : FALSE)
00273 #define Usb_ack_resume() (UDINT = ~(1<<EORSMI))
00275 #define Is_usb_resume() ((UDINT & (1<<EORSMI)) ? TRUE : FALSE)
00276
00278 #define Usb_enable_wake_up_interrupt() (UDIEN |= (1<<WAKEUPE))
00280 #define Usb_disable_wake_up_interrupt() (UDIEN &= ~(1<<WAKEUPE))
00281 #define Is_wake_up_interrupt_enabled() ((UDIEN & (1<<WAKEUPE)) ? TRUE : FALSE)
00283 #define Usb_ack_wake_up() (UDINT = ~(1<<WAKEUPI))
00285 #define Is_usb_wake_up() ((UDINT & (1<<WAKEUPI)) ? TRUE : FALSE)
00286
00288 #define Usb_enable_reset_interrupt() (UDIEN |= (1<<EORSTE))
00290 #define Usb_disable_reset_interrupt() (UDIEN &= ~(1<<EORSTE))
00291 #define Is_reset_interrupt_enabled() ((UDIEN & (1<<EORSTE)) ? TRUE : FALSE)
00293 #define Usb_ack_reset() (UDINT = ~(1<<EORSTI))
00295 #define Is_usb_reset() ((UDINT & (1<<EORSTI)) ? TRUE : FALSE)
00296
00298 #define Usb_enable_sof_interrupt() (UDIEN |= (1<<SOFE))
00300 #define Usb_disable_sof_interrupt() (UDIEN &= ~(1<<SOFE))
00301 #define Is_sof_interrupt_enabled() ((UDIEN & (1<<SOFE)) ? TRUE : FALSE)
00303 #define Usb_ack_sof() (UDINT = ~(1<<SOFI))
00305 #define Is_usb_sof() ((UDINT & (1<<SOFI)) ? TRUE : FALSE)
00306
00308 #define Usb_enable_suspend_interrupt() (UDIEN |= (1<<SUSPE))
00310 #define Usb_disable_suspend_interrupt() (UDIEN &= ~(1<<SUSPE))
00312 #define Is_suspend_interrupt_enabled() ((UDIEN & (1<<SUSPE)) ? TRUE : FALSE)
00314 #define Usb_ack_suspend() (UDINT = ~(1<<SUSPI))
00316 #define Is_usb_suspend() ((UDINT & (1<<SUSPI)) ? TRUE : FALSE)
00317
00319 #define Usb_enable_address() (UDADDR |= (1<<ADDEN))
00321 #define Usb_disable_address() (UDADDR &= ~(1<<ADDEN))
00323 #define Is_usb_addressed() ((UDADDR & (1<<ADDEN)) ? TRUE : FALSE)
00325 #define Usb_configure_address(addr) (UDADDR = (UDADDR & (1<<ADDEN)) | ((U8)addr & MSK_UADD))
00326
00328 #define Usb_frame_number() ((U16)((((U16)UDFNUMH) << 8) | ((U16)UDFNUML)))
00330 #define Is_usb_frame_number_crc_error() ((UDMFN & (1<<FNCERR)) ? TRUE : FALSE)
00332
00333
00334
00335
00340 #define Usb_select_endpoint(ep) (UENUM = (U8)ep )
00341
00343 #define Usb_get_selected_endpoint() (UENUM )
00344
00346 #define Usb_reset_endpoint(ep) (UERST = 1 << (U8)ep, UERST = 0)
00347
00349 #define Usb_enable_endpoint() (UECONX |= (1<<EPEN))
00351 #define Usb_enable_stall_handshake() (UECONX |= (1<<STALLRQ))
00353 #define Usb_reset_data_toggle() (UECONX |= (1<<RSTDT))
00355 #define Usb_disable_endpoint() (UECONX &= ~(1<<EPEN))
00357 #define Usb_disable_stall_handshake() (UECONX |= (1<<STALLRQC))
00359 #define Usb_select_epnum_for_cpu() (UECONX &= ~(1<<EPNUMS))
00361 #define Is_usb_endpoint_enabled() ((UECONX & (1<<EPEN)) ? TRUE : FALSE)
00363 #define Is_usb_endpoint_stall_requested() ((UECONX & (1<<STALLRQ)) ? TRUE : FALSE)
00364
00366 #define Usb_configure_endpoint_type(type) (UECFG0X = (UECFG0X & ~(MSK_EPTYPE)) | ((U8)type << 6))
00368 #define Usb_configure_endpoint_direction(dir) (UECFG0X = (UECFG0X & ~(1<<EPDIR)) | ((U8)dir))
00369
00371 #define Usb_configure_endpoint_size(size) (UECFG1X = (UECFG1X & ~MSK_EPSIZE) | ((U8)size << 4))
00373 #define Usb_configure_endpoint_bank(bank) (UECFG1X = (UECFG1X & ~MSK_EPBK) | ((U8)bank << 2))
00375 #define Usb_allocate_memory() (UECFG1X |= (1<<ALLOC))
00377 #define Usb_unallocate_memory() (UECFG1X &= ~(1<<ALLOC))
00378
00380 #define Usb_ack_overflow_interrupt() (UESTA0X &= ~(1<<OVERFI))
00382 #define Usb_ack_underflow_interrupt() (UESTA0X &= ~(1<<UNDERFI))
00384 #define Usb_ack_zlp() (UESTA0X &= ~(1<<ZLPSEEN))
00386 #define Usb_data_toggle() ((UESTA0X&MSK_DTSEQ) >> 2)
00388 #define Usb_nb_busy_bank() (UESTA0X & MSK_NBUSYBK)
00390 #define Is_usb_one_bank_busy() ((UESTA0X & MSK_NBUSYBK) == 0 ? FALSE : TRUE)
00392 #define Is_endpoint_configured() ((UESTA0X & (1<<CFGOK)) ? TRUE : FALSE)
00394 #define Is_usb_overflow() ((UESTA0X & (1<<OVERFI)) ? TRUE : FALSE)
00396 #define Is_usb_underflow() ((UESTA0X & (1<<UNDERFI)) ? TRUE : FALSE)
00398 #define Is_usb_zlp() ((UESTA0X & (1<<ZLPSEEN)) ? TRUE : FALSE)
00399
00401 #define Usb_control_direction() ((UESTA1X & (1<<CTRLDIR)) >> 2)
00403 #define Usb_current_bank() ( UESTA1X & MSK_CURRBK)
00404
00406 #define Usb_ack_fifocon() (UEINTX &= ~(1<<FIFOCON))
00408 #define Usb_ack_nak_in() (UEINTX &= ~(1<<NAKINI))
00410 #define Usb_ack_nak_out() (UEINTX &= ~(1<<NAKOUTI))
00412 #define Usb_ack_receive_setup() (UEINTX &= ~(1<<RXSTPI))
00414 #define Usb_ack_receive_out() (UEINTX &= ~(1<<RXOUTI), Usb_ack_fifocon())
00416 #define Usb_ack_stalled() (MSK_STALLEDI= 0)
00418 #define Usb_ack_in_ready() (UEINTX &= ~(1<<TXINI), Usb_ack_fifocon())
00420 #define Usb_kill_last_in_bank() (UENTTX |= (1<<RXOUTI))
00422 #define Is_usb_read_enabled() (UEINTX&(1<<RWAL))
00424 #define Is_usb_write_enabled() (UEINTX&(1<<RWAL))
00426 #define Is_usb_read_control_enabled() (UEINTX&(1<<TXINI))
00428 #define Is_usb_nak_in_sent() (UEINTX&(1<<NAKINI))
00430 #define Is_usb_nak_out_sent() (UEINTX&(1<<NAKOUTI))
00432 #define Is_usb_receive_setup() (UEINTX&(1<<RXSTPI))
00434 #define Is_usb_receive_out() (UEINTX&(1<<RXOUTI))
00436 #define Is_usb_in_ready() (UEINTX&(1<<TXINI))
00438 #define Usb_send_in() (UEINTX &= ~(1<<FIFOCON))
00440 #define Usb_send_control_in() (UEINTX &= ~(1<<TXINI))
00442 #define Usb_free_out_bank() (UEINTX &= ~(1<<FIFOCON))
00444 #define Usb_ack_control_out() (UEINTX &= ~(1<<RXOUTI))
00445
00447 #define Usb_enable_flow_error_interrupt() (UEIENX |= (1<<FLERRE))
00449 #define Usb_enable_nak_in_interrupt() (UEIENX |= (1<<NAKINE))
00451 #define Usb_enable_nak_out_interrupt() (UEIENX |= (1<<NAKOUTE))
00453 #define Usb_enable_receive_setup_interrupt() (UEIENX |= (1<<RXSTPE))
00455 #define Usb_enable_receive_out_interrupt() (UEIENX |= (1<<RXOUTE))
00457 #define Usb_enable_stalled_interrupt() (UEIENX |= (1<<STALLEDE))
00459 #define Usb_enable_in_ready_interrupt() (UEIENX |= (1<<TXIN))
00461 #define Usb_disable_flow_error_interrupt() (UEIENX &= ~(1<<FLERRE))
00463 #define Usb_disable_nak_in_interrupt() (UEIENX &= ~(1<<NAKINE))
00465 #define Usb_disable_nak_out_interrupt() (UEIENX &= ~(1<<NAKOUTE))
00467 #define Usb_disable_receive_setup_interrupt() (UEIENX &= ~(1<<RXSTPE))
00469 #define Usb_disable_receive_out_interrupt() (UEIENX &= ~(1<<RXOUTE))
00471 #define Usb_disable_stalled_interrupt() (UEIENX &= ~(1<<STALLEDE))
00473 #define Usb_disable_in_ready_interrupt() (UEIENX &= ~(1<<TXIN))
00474
00476 #define Usb_read_byte() (UEDATX)
00478 #define Usb_write_byte(byte) (UEDATX = (U8)byte)
00479
00481 #define Usb_byte_counter() ((U8)(UEBCLX))
00483 #define Usb_byte_counter_8() ((U8)UEBCLX)
00484
00486 #define Usb_interrupt_flags() (UEINT)
00488 #define Is_usb_endpoint_event() (Usb_interrupt_flags() != 0x00)
00490
00491
00492
00499
00500 #define wSWAP(x) \
00501 ( (((x)>>8)&0x00FF) \
00502 | (((x)<<8)&0xFF00) \
00503 )
00504
00505
00513 #if !defined(BIG_ENDIAN) && !defined(LITTLE_ENDIAN)
00514 #error YOU MUST Define the Endian Type of target: LITTLE_ENDIAN or BIG_ENDIAN
00515 #endif
00516 #ifdef LITTLE_ENDIAN
00517 #define Usb_write_word_enum_struc(x) (x)
00518 #else //BIG_ENDIAN
00519 #define Usb_write_word_enum_struc(x) (wSWAP(x))
00520 #endif
00521
00522
00524
00525
00526
00527 U8 usb_config_ep (U8, U8);
00528 U8 usb_select_enpoint_interrupt (void);
00529 U16 usb_get_nb_byte_epw (void);
00530 U8 usb_send_packet (U8 , U8*, U8);
00531 U8 usb_read_packet (U8 , U8*, U8);
00532 void usb_halt_endpoint (U8);
00533 void usb_reset_endpoint (U8);
00534 U8 usb_init_device (void);
00535
00536
00537 #endif // _USB_DRV_H_
00538