wdt_drv.c

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00013 
00014 /* Copyright (c) 2009 Atmel Corporation. All rights reserved.
00015  *
00016  * Redistribution and use in source and binary forms, with or without
00017  * modification, are permitted provided that the following conditions are met:
00018  *
00019  * 1. Redistributions of source code must retain the above copyright notice,
00020  * this list of conditions and the following disclaimer.
00021  *
00022  * 2. Redistributions in binary form must reproduce the above copyright notice,
00023  * this list of conditions and the following disclaimer in the documentation
00024  * and/or other materials provided with the distribution.
00025  *
00026  * 3. The name of Atmel may not be used to endorse or promote products derived
00027  * from this software without specific prior written permission.
00028  *
00029  * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
00030  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
00031  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE EXPRESSLY AND
00032  * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
00033  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
00034  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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00036  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
00037  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
00038  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00039  */
00040 
00041 //_____ I N C L U D E S ____________________________________________________
00042 
00043 #include "config.h"
00044 #include "wdt_drv.h"
00045 
00046 //_____ M A C R O S ________________________________________________________
00047 
00048 #ifdef __GNUC__
00049 #define  Wdt_reset_instruction()    wdt_reset()
00050 #else
00051 #define  Wdt_reset_instruction()    __watchdog_reset()
00052 #endif
00053 
00054 
00057 #ifndef __GNUC__
00058    // Ignored if IAR compiler optimization option "Always do cross call optimization" is enabled
00059    #pragma optimize=none 
00060 #endif
00061 void wdtdrv_disable(void)
00062 {
00063    U8 save_int=Get_interrupt_state();
00064    Disable_interrupt();
00065 #ifdef  __GNUC__
00066    Ack_wdt_reset();
00067    wdt_disable();
00068 #else
00069    Ack_wdt_reset();
00070    Wdt_reset_instruction();
00071    WDTCSR = (1<<WDCE) | (1<<WDE);
00072    WDTCSR = 0x00;
00073 #endif
00074    if(save_int) { Enable_interrupt(); }
00075 }
00076 
00077 
00082 #ifndef __GNUC__
00083    // Ignored if IAR compiler optimization option "Always do cross call optimization" is enabled
00084    #pragma optimize=none 
00085 #endif
00086 void wdtdrv_enable( U8 timeout )
00087 {
00088    U8 save_int=Get_interrupt_state();
00089    Disable_interrupt();
00090 #ifdef  __GNUC__
00091    Ack_wdt_reset();
00092    wdt_enable(timeout);
00093 #else
00094    timeout = (1<<WDE)| (timeout & 0x08 ? (1<<WDP3) : 0x00) | (timeout & 0x07);
00095    Disable_interrupt();
00096    Wdt_reset_instruction();
00097    WDTCSR = (1<<WDCE) | (1<<WDE);
00098    WDTCSR = timeout;
00099 #endif
00100    if(save_int) { Enable_interrupt(); }
00101 }
00102 
00103 
00108 #ifndef __GNUC__
00109    // Ignored if IAR compiler optimization option "Always do cross call optimization" is enabled
00110    #pragma optimize=none 
00111 #endif
00112 void wdtdrv_interrupt_enable( U8 timeout )
00113 {
00114    U8 save_int=Get_interrupt_state();
00115 #ifdef  __GNUC__
00116    Ack_wdt_reset();
00117     __asm__ __volatile__ (  \
00118         "in __tmp_reg__,__SREG__" "\n\t"    \
00119         "cli" "\n\t"    \
00120         "wdr" "\n\t"    \
00121         "sts %0,%1" "\n\t"  \
00122         "out __SREG__,__tmp_reg__" "\n\t"   \
00123         "sts %0,%2" \
00124         : /* no outputs */  \
00125         : "M" (_SFR_MEM_ADDR(_WD_CONTROL_REG)), \
00126         "r" (_BV(_WD_CHANGE_BIT) | _BV(WDE)), \
00127         "r" ((uint8_t) ((timeout & 0x08 ? _WD_PS3_MASK : 0x00) | \
00128             _BV(WDIE) | (timeout & 0x07)) ) \
00129         : "r0"  \
00130     );
00131 #else
00132    timeout = (1<<WDIE)| (timeout & 0x08 ? (1<<WDP3) : 0x00) | (timeout & 0x07);
00133    Disable_interrupt();
00134    Wdt_reset_instruction();
00135    WDTCSR = (1<<WDCE) | (1<<WDE);
00136    WDTCSR = timeout;
00137 #endif
00138    if(save_int) { Enable_interrupt(); }
00139 }
00140 
00141 
00146 #ifndef __GNUC__
00147    // Ignored if IAR compiler optimization option "Always do cross call optimization" is enabled
00148    #pragma optimize=none 
00149 #endif
00150 void wdtdrv_interrupt_reset_enable( U8 timeout )
00151 {
00152    U8 save_int=Get_interrupt_state();
00153    Disable_interrupt();
00154 #ifdef  __GNUC__
00155    Ack_wdt_reset();
00156     __asm__ __volatile__ (  \
00157         "in __tmp_reg__,__SREG__" "\n\t"    \
00158         "cli" "\n\t"    \
00159         "wdr" "\n\t"    \
00160         "sts %0,%1" "\n\t"  \
00161         "out __SREG__,__tmp_reg__" "\n\t"   \
00162         "sts %0,%2" \
00163         : /* no outputs */  \
00164         : "M" (_SFR_MEM_ADDR(_WD_CONTROL_REG)), \
00165         "r" (_BV(_WD_CHANGE_BIT) | _BV(WDE)), \
00166         "r" ((uint8_t) ((timeout & 0x08 ? _WD_PS3_MASK : 0x00) | \
00167             _BV(WDE) | _BV(WDIE) | (timeout & 0x07)) ) \
00168         : "r0"  \
00169     );
00170 #else
00171    timeout = (1<<WDIE)|(1<<WDE)| (timeout & 0x08 ? (1<<WDP3) : 0x00) | (timeout & 0x07);
00172    Disable_interrupt();
00173    Wdt_reset_instruction();
00174    WDTCSR = (1<<WDCE) | (1<<WDE);
00175    WDTCSR = timeout;
00176 #endif
00177    if(save_int) { Enable_interrupt(); }
00178 }
00179 

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