Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 

 
Software Version and Target Device
Product Version: ISE:14.7 (ISE) - P.20131013 Target Family: Spartan6
OS Platform: NT Target Device: xc6slx9
Project ID (random number) 7d539191f171434fbf9e6e718b1bf186.FF2AC3C0A6854FDD93A0F3A5EC647663.9 Target Package: csg324
Registration ID 211397446_0_0_147 Target Speed: -3
Date Generated 2019-04-15T17:26:13 Tool Flow ISE
 
User Environment
OS Name Microsoft , 64-bit OS Release major release (build 9200)
CPU Name Intel(R) Core(TM) i7-8750H CPU @ 2.20GHz CPU Speed 2208 MHz
OS Name Microsoft , 64-bit OS Release major release (build 9200)
CPU Name Intel(R) Core(TM) i7-8750H CPU @ 2.20GHz CPU Speed 2208 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Accumulators=28
  • 1-bit up accumulator=3
  • 10-bit up accumulator=2
  • 16-bit up accumulator=3
  • 2-bit up loadable accumulator=6
  • 3-bit up accumulator=9
  • 32-bit up accumulator=1
  • 4-bit up loadable accumulator=4
Adders/Subtractors=63
  • 1-bit subtractor=1
  • 10-bit adder=2
  • 10-bit subtractor=2
  • 12-bit adder=4
  • 2-bit subtractor=12
  • 27-bit adder=1
  • 3-bit adder=5
  • 3-bit subtractor=4
  • 32-bit adder=4
  • 32-bit adder carry in=1
  • 33-bit adder=1
  • 33-bit subtractor=1
  • 4-bit adder=5
  • 4-bit subtractor=6
  • 5-bit subtractor=1
  • 52-bit adder=2
  • 6-bit adder=2
  • 6-bit subtractor=2
  • 64-bit adder=1
  • 7-bit adder=1
  • 8-bit adder=1
  • 8-bit subtractor=4
Comparators=80
  • 1-bit comparator equal=8
  • 1-bit comparator not equal=3
  • 10-bit comparator equal=3
  • 10-bit comparator not equal=1
  • 12-bit comparator equal=6
  • 12-bit comparator not equal=2
  • 13-bit comparator not equal=1
  • 16-bit comparator equal=4
  • 18-bit comparator equal=1
  • 2-bit comparator equal=6
  • 2-bit comparator greater=4
  • 2-bit comparator lessequal=12
  • 20-bit comparator equal=2
  • 3-bit comparator equal=5
  • 3-bit comparator lessequal=3
  • 32-bit comparator equal=2
  • 4-bit comparator equal=4
  • 4-bit comparator greater=1
  • 5-bit comparator equal=9
  • 7-bit comparator equal=2
  • 8-bit comparator equal=1
Counters=10
  • 13-bit up counter=1
  • 16-bit up counter=1
  • 18-bit up counter=1
  • 20-bit down counter=1
  • 3-bit up counter=3
  • 6-bit up counter=1
  • 8-bit down counter=1
  • 9-bit up counter=1
FSMs=6 Logic shifters=3
  • 33-bit shifter arithmetic right=1
  • 4-bit shifter logical left=2
Multiplexers=1322
  • 1-bit 2-to-1 multiplexer=1019
  • 1-bit 4-to-1 multiplexer=23
  • 1-bit 7-to-1 multiplexer=1
  • 1-bit 8-to-1 multiplexer=1
  • 10-bit 2-to-1 multiplexer=4
  • 12-bit 2-to-1 multiplexer=9
  • 13-bit 2-to-1 multiplexer=11
  • 13-bit 4-to-1 multiplexer=1
  • 16-bit 2-to-1 multiplexer=3
  • 2-bit 2-to-1 multiplexer=86
  • 2-bit 7-to-1 multiplexer=4
  • 20-bit 2-to-1 multiplexer=2
  • 26-bit 2-to-1 multiplexer=1
  • 3-bit 2-to-1 multiplexer=38
  • 3-bit 4-to-1 multiplexer=2
  • 32-bit 2-to-1 multiplexer=58
  • 32-bit 3-to-1 multiplexer=1
  • 32-bit 4-to-1 multiplexer=4
  • 33-bit 2-to-1 multiplexer=2
  • 4-bit 2-to-1 multiplexer=27
  • 6-bit 2-to-1 multiplexer=4
  • 8-bit 2-to-1 multiplexer=21
Multipliers=4
  • 16x16-bit registered multiplier=1
  • 17x17-bit registered multiplier=3
RAMs=18
  • 1024x32-bit dual-port block RAM=1
  • 1024x8-bit dual-port block RAM=4
  • 1024x8-bit single-port distributed RAM=4
  • 128x22-bit dual-port block RAM=2
  • 16x8-bit dual-port distributed RAM=2
  • 32x32-bit dual-port block RAM=2
  • 512x33-bit dual-port block RAM=1
  • 8x32-bit dual-port distributed RAM=1
  • 8x4-bit single-port distributed Read Only RAM=1
Registers=3260
  • Flip-Flops=3260
Xors=25
  • 1-bit xor2=22
  • 10-bit xor2=2
  • 32-bit xor2=1
MiscellaneousStatistics
  • AGG_BONDED_IO=98
  • AGG_IO=98
  • AGG_SLICE=1346
  • NUM_BONDED_IOB=98
  • NUM_BSFULL=2408
  • NUM_BSLUTONLY=1643
  • NUM_BSREGONLY=538
  • NUM_BSUSED=4589
  • NUM_BUFG=5
  • NUM_BUFIO2=2
  • NUM_BUFIO2FB=2
  • NUM_DCM=1
  • NUM_DPRAM_O5ANDO6=28
  • NUM_DPRAM_O6ONLY=12
  • NUM_DSP48A1=4
  • NUM_LOGIC_O5ANDO6=707
  • NUM_LOGIC_O5ONLY=174
  • NUM_LOGIC_O6ONLY=2557
  • NUM_LUT_RT_DRIVES_CARRY4=15
  • NUM_LUT_RT_DRIVES_FLOP=30
  • NUM_LUT_RT_EXO5=28
  • NUM_LUT_RT_EXO6=14
  • NUM_LUT_RT_O5=23
  • NUM_LUT_RT_O5ANDO6=3
  • NUM_LUT_RT_O6=174
  • NUM_PLL_ADV=1
  • NUM_RAMB16BWER=3
  • NUM_RAMB8BWER=8
  • NUM_SLICEL=192
  • NUM_SLICEM=145
  • NUM_SLICEX=1009
  • NUM_SLICE_CARRY4=163
  • NUM_SLICE_CONTROLSET=157
  • NUM_SLICE_CYINIT=5021
  • NUM_SLICE_F7MUX=285
  • NUM_SLICE_F8MUX=128
  • NUM_SLICE_FF=3228
  • NUM_SLICE_UNUSEDCTRL=167
  • NUM_SPRAM_O6ONLY=512
  • NUM_SRL_O5ANDO6=5
  • NUM_SRL_O6ONLY=11
  • NUM_UNUSABLE_FF_BELS=451
NetStatistics
  • NumNets_Active=6154
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_BOUNCEACROSS=437
  • NumNodesOfType_Active_BOUNCEIN=1036
  • NumNodesOfType_Active_BUFGOUT=5
  • NumNodesOfType_Active_BUFHINP2OUT=16
  • NumNodesOfType_Active_BUFIOINP=4
  • NumNodesOfType_Active_CLKPIN=1185
  • NumNodesOfType_Active_CLKPINFEED=30
  • NumNodesOfType_Active_CNTRLPIN=1251
  • NumNodesOfType_Active_DOUBLE=14498
  • NumNodesOfType_Active_GENERIC=136
  • NumNodesOfType_Active_GLOBAL=169
  • NumNodesOfType_Active_INPUT=777
  • NumNodesOfType_Active_IOBIN2OUT=97
  • NumNodesOfType_Active_IOBOUTPUT=97
  • NumNodesOfType_Active_LUTINPUT=19896
  • NumNodesOfType_Active_OUTBOUND=6364
  • NumNodesOfType_Active_OUTPUT=6189
  • NumNodesOfType_Active_PADINPUT=66
  • NumNodesOfType_Active_PADOUTPUT=30
  • NumNodesOfType_Active_PINBOUNCE=5226
  • NumNodesOfType_Active_PINFEED=21984
  • NumNodesOfType_Active_PINFEED2=2
  • NumNodesOfType_Active_QUAD=10644
  • NumNodesOfType_Active_REGINPUT=1873
  • NumNodesOfType_Active_SINGLE=15228
  • NumNodesOfType_Gnd_BOUNCEACROSS=5
  • NumNodesOfType_Gnd_BOUNCEIN=139
  • NumNodesOfType_Gnd_CLKPIN=1
  • NumNodesOfType_Gnd_CNTRLPIN=2
  • NumNodesOfType_Gnd_DOUBLE=17
  • NumNodesOfType_Gnd_GENERIC=1
  • NumNodesOfType_Gnd_HGNDOUT=79
  • NumNodesOfType_Gnd_INPUT=449
  • NumNodesOfType_Gnd_IOBIN2OUT=1
  • NumNodesOfType_Gnd_IOBOUTPUT=1
  • NumNodesOfType_Gnd_LUTINPUT=124
  • NumNodesOfType_Gnd_OUTBOUND=18
  • NumNodesOfType_Gnd_OUTPUT=22
  • NumNodesOfType_Gnd_PADINPUT=1
  • NumNodesOfType_Gnd_PINBOUNCE=220
  • NumNodesOfType_Gnd_PINFEED=525
  • NumNodesOfType_Gnd_QUAD=2
  • NumNodesOfType_Gnd_REGINPUT=66
  • NumNodesOfType_Gnd_SINGLE=25
  • NumNodesOfType_Vcc_CNTRLPIN=5
  • NumNodesOfType_Vcc_GENERIC=1
  • NumNodesOfType_Vcc_HVCCOUT=427
  • NumNodesOfType_Vcc_INPUT=25
  • NumNodesOfType_Vcc_IOBIN2OUT=1
  • NumNodesOfType_Vcc_IOBOUTPUT=1
  • NumNodesOfType_Vcc_KVCCOUT=15
  • NumNodesOfType_Vcc_LUTINPUT=983
  • NumNodesOfType_Vcc_PADINPUT=1
  • NumNodesOfType_Vcc_PINBOUNCE=12
  • NumNodesOfType_Vcc_PINFEED=1009
  • NumNodesOfType_Vcc_REGINPUT=7
SiteStatistics
  • BUFG-BUFGMUX=5
  • IOB-IOBM=50
  • IOB-IOBS=48
  • SLICEL-SLICEM=101
  • SLICEX-SLICEL=248
  • SLICEX-SLICEM=104
SiteSummary
  • BUFG=5
  • BUFG_BUFG=5
  • BUFIO2=2
  • BUFIO2FB=2
  • BUFIO2FB_BUFIO2FB=2
  • BUFIO2_BUFIO2=2
  • CARRY4=163
  • DCM=1
  • DCM_DCM=1
  • DSP48A1=4
  • DSP48A1_DSP48A1=4
  • FF_SR=370
  • HARD0=19
  • HARD1=11
  • IOB=98
  • IOB_IMUX=30
  • IOB_INBUF=30
  • IOB_OUTBUF=68
  • LUT5=935
  • LUT6=3454
  • LUT_OR_MEM5=33
  • LUT_OR_MEM6=569
  • PAD=98
  • PLL_ADV=1
  • PLL_ADV_PLL_ADV=1
  • RAMB16BWER=3
  • RAMB16BWER_RAMB16BWER=3
  • RAMB8BWER=8
  • RAMB8BWER_RAMB8BWER=8
  • REG_SR=2858
  • SELMUX2_1=413
  • SLICEL=192
  • SLICEM=145
  • SLICEX=1009
 
Configuration Data
BUFIO2FB_BUFIO2FB
  • DIVIDE_BYPASS=[TRUE:2]
  • INVERT_INPUTS=[FALSE:2]
BUFIO2_BUFIO2
  • DIVIDE=[1:2]
  • DIVIDE_BYPASS=[TRUE:2]
  • I_INVERT=[FALSE:2]
DCM
  • PSCLK=[PSCLK_INV:0] [PSCLK:1]
  • PSEN=[PSEN_INV:0] [PSEN:1]
  • PSINCDEC=[PSINCDEC_INV:0] [PSINCDEC:1]
  • RST=[RST:1] [RST_INV:0]
DCM_DCM
  • CLKDV_DIVIDE=[2.0:1]
  • CLKIN_DIVIDE_BY_2=[FALSE:1]
  • CLKOUT_PHASE_SHIFT=[NONE:1]
  • CLK_FEEDBACK=[1X:1]
  • DESKEW_ADJUST=[5:1]
  • DFS_FREQUENCY_MODE=[LOW:1]
  • DLL_FREQUENCY_MODE=[LOW:1]
  • DSS_MODE=[NONE:1]
  • DUTY_CYCLE_CORRECTION=[TRUE:1]
  • PSCLK=[PSCLK_INV:0] [PSCLK:1]
  • PSEN=[PSEN_INV:0] [PSEN:1]
  • PSINCDEC=[PSINCDEC_INV:0] [PSINCDEC:1]
  • RST=[RST:1] [RST_INV:0]
  • STARTUP_WAIT=[FALSE:1]
  • VERY_HIGH_FREQUENCY=[FALSE:1]
DSP48A1
  • CEA=[CEA_INV:0] [CEA:4]
  • CEB=[CEB_INV:0] [CEB:4]
  • CEC=[CEC:4] [CEC_INV:0]
  • CECARRYIN=[CECARRYIN:4] [CECARRYIN_INV:0]
  • CED=[CED_INV:0] [CED:4]
  • CEM=[CEM_INV:0] [CEM:4]
  • CEOPMODE=[CEOPMODE_INV:0] [CEOPMODE:4]
  • CEP=[CEP:4] [CEP_INV:0]
  • CLK=[CLK:4] [CLK_INV:0]
  • RSTA=[RSTA:4] [RSTA_INV:0]
  • RSTB=[RSTB:4] [RSTB_INV:0]
  • RSTC=[RSTC_INV:0] [RSTC:4]
  • RSTCARRYIN=[RSTCARRYIN_INV:0] [RSTCARRYIN:4]
  • RSTD=[RSTD_INV:0] [RSTD:4]
  • RSTM=[RSTM:4] [RSTM_INV:0]
  • RSTOPMODE=[RSTOPMODE_INV:0] [RSTOPMODE:4]
  • RSTP=[RSTP_INV:0] [RSTP:4]
DSP48A1_DSP48A1
  • A0REG=[0:4]
  • A1REG=[0:4]
  • B0REG=[0:4]
  • B1REG=[0:4]
  • B_INPUT=[DIRECT:4]
  • CARRYINREG=[0:4]
  • CARRYINSEL=[OPMODE5:4]
  • CARRYOUTREG=[0:4]
  • CEA=[CEA_INV:0] [CEA:4]
  • CEB=[CEB_INV:0] [CEB:4]
  • CEC=[CEC:4] [CEC_INV:0]
  • CECARRYIN=[CECARRYIN:4] [CECARRYIN_INV:0]
  • CED=[CED_INV:0] [CED:4]
  • CEM=[CEM_INV:0] [CEM:4]
  • CEOPMODE=[CEOPMODE_INV:0] [CEOPMODE:4]
  • CEP=[CEP:4] [CEP_INV:0]
  • CLK=[CLK:4] [CLK_INV:0]
  • CREG=[0:4]
  • DREG=[0:4]
  • MREG=[1:4]
  • OPMODEREG=[0:4]
  • PREG=[0:3] [1:1]
  • RSTA=[RSTA:4] [RSTA_INV:0]
  • RSTB=[RSTB:4] [RSTB_INV:0]
  • RSTC=[RSTC_INV:0] [RSTC:4]
  • RSTCARRYIN=[RSTCARRYIN_INV:0] [RSTCARRYIN:4]
  • RSTD=[RSTD_INV:0] [RSTD:4]
  • RSTM=[RSTM:4] [RSTM_INV:0]
  • RSTOPMODE=[RSTOPMODE_INV:0] [RSTOPMODE:4]
  • RSTP=[RSTP_INV:0] [RSTP:4]
  • RSTTYPE=[SYNC:4]
FF_SR
  • CK=[CK:370] [CK_INV:0]
  • SRINIT=[SRINIT0:368] [SRINIT1:2]
  • SYNC_ATTR=[ASYNC:349] [SYNC:21]
IOB_OUTBUF
  • DRIVEATTRBOX=[12:68]
  • SLEW=[SLOW:68]
  • SUSPEND=[3STATE:68]
LUT_OR_MEM5
  • CLK=[CLK:33] [CLK_INV:0]
  • LUT_OR_MEM=[RAM:33]
  • RAMMODE=[SRL16:5] [DPRAM32:28]
LUT_OR_MEM6
  • CLK=[CLK:568] [CLK_INV:0]
  • LUT_OR_MEM=[LUT:1] [RAM:568]
  • RAMMODE=[SPRAM64:512] [SRL16:15] [SRL32:1] [DPRAM32:28] [DPRAM64:12]
PLL_ADV
  • RST=[RST:1] [RST_INV:0]
PLL_ADV_PLL_ADV
  • BANDWIDTH=[OPTIMIZED:1]
  • CLK_FEEDBACK=[CLKFBOUT:1]
  • COMPENSATION=[SYSTEM_SYNCHRONOUS:1]
  • PLL_ADD_LEAKAGE=[2:1]
  • PLL_AVDD_COMP_SET=[2:1]
  • PLL_CLAMP_BYPASS=[FALSE:1]
  • PLL_CLAMP_REF_SEL=[1:1]
  • PLL_CLK0MX=[0:1]
  • PLL_CLK1MX=[0:1]
  • PLL_CLK2MX=[0:1]
  • PLL_CLK3MX=[0:1]
  • PLL_CLK4MX=[0:1]
  • PLL_CLK5MX=[0:1]
  • PLL_CLKBURST_CNT=[0:1]
  • PLL_CLKBURST_ENABLE=[TRUE:1]
  • PLL_CLKCNTRL=[0:1]
  • PLL_CLKFBMX=[0:1]
  • PLL_CLKFBOUT2_EDGE=[TRUE:1]
  • PLL_CLKFBOUT2_NOCOUNT=[TRUE:1]
  • PLL_CLKFBOUT_EDGE=[TRUE:1]
  • PLL_CLKFBOUT_EN=[FALSE:1]
  • PLL_CLKFBOUT_NOCOUNT=[TRUE:1]
  • PLL_CLKOUT0_EDGE=[TRUE:1]
  • PLL_CLKOUT0_EN=[FALSE:1]
  • PLL_CLKOUT0_NOCOUNT=[TRUE:1]
  • PLL_CLKOUT1_EDGE=[TRUE:1]
  • PLL_CLKOUT1_EN=[FALSE:1]
  • PLL_CLKOUT1_NOCOUNT=[TRUE:1]
  • PLL_CLKOUT2_EDGE=[TRUE:1]
  • PLL_CLKOUT2_EN=[FALSE:1]
  • PLL_CLKOUT2_NOCOUNT=[TRUE:1]
  • PLL_CLKOUT3_EDGE=[TRUE:1]
  • PLL_CLKOUT3_EN=[FALSE:1]
  • PLL_CLKOUT3_NOCOUNT=[TRUE:1]
  • PLL_CLKOUT4_EDGE=[TRUE:1]
  • PLL_CLKOUT4_EN=[FALSE:1]
  • PLL_CLKOUT4_NOCOUNT=[TRUE:1]
  • PLL_CLKOUT5_EDGE=[TRUE:1]
  • PLL_CLKOUT5_EN=[FALSE:1]
  • PLL_CLKOUT5_NOCOUNT=[TRUE:1]
  • PLL_CLK_LOST_DETECT=[FALSE:1]
  • PLL_CP=[1:1]
  • PLL_CP_BIAS_TRIP_SHIFT=[TRUE:1]
  • PLL_CP_REPL=[1:1]
  • PLL_CP_RES=[0:1]
  • PLL_DIRECT_PATH_CNTRL=[TRUE:1]
  • PLL_DIVCLK_EDGE=[TRUE:1]
  • PLL_DIVCLK_NOCOUNT=[TRUE:1]
  • PLL_DVDD_COMP_SET=[2:1]
  • PLL_EN=[FALSE:1]
  • PLL_EN_DLY=[TRUE:1]
  • PLL_EN_LEAKAGE=[2:1]
  • PLL_EN_TCLK0=[TRUE:1]
  • PLL_EN_TCLK1=[TRUE:1]
  • PLL_EN_TCLK2=[TRUE:1]
  • PLL_EN_TCLK3=[TRUE:1]
  • PLL_EN_VCO0=[FALSE:1]
  • PLL_EN_VCO1=[FALSE:1]
  • PLL_EN_VCO2=[FALSE:1]
  • PLL_EN_VCO3=[FALSE:1]
  • PLL_EN_VCO4=[FALSE:1]
  • PLL_EN_VCO5=[FALSE:1]
  • PLL_EN_VCO6=[FALSE:1]
  • PLL_EN_VCO7=[FALSE:1]
  • PLL_EN_VCO_DIV1=[FALSE:1]
  • PLL_EN_VCO_DIV6=[TRUE:1]
  • PLL_INTFB=[0:1]
  • PLL_IO_CLKSRC=[0:1]
  • PLL_LFHF=[3:1]
  • PLL_LOCK_FB_DLY=[3:1]
  • PLL_LOCK_REF_DLY=[5:1]
  • PLL_MAN_LF_EN=[TRUE:1]
  • PLL_NBTI_EN=[TRUE:1]
  • PLL_PFD_CNTRL=[8:1]
  • PLL_PFD_DLY=[1:1]
  • PLL_PWRD_CFG=[FALSE:1]
  • PLL_REG_INPUT=[TRUE:1]
  • PLL_RES=[1:1]
  • PLL_SEL_SLIPD=[FALSE:1]
  • PLL_SKEW_CNTRL=[0:1]
  • PLL_TEST_IN_WINDOW=[FALSE:1]
  • PLL_VDD_SEL=[0:1]
  • PLL_VLFHIGH_DIS=[TRUE:1]
  • RST=[RST:1] [RST_INV:0]
RAMB16BWER
  • CLKA=[CLKA_INV:0] [CLKA:3]
  • CLKB=[CLKB_INV:0] [CLKB:3]
  • ENA=[ENA_INV:0] [ENA:3]
  • ENB=[ENB_INV:0] [ENB:3]
  • REGCEA=[REGCEA_INV:0] [REGCEA:3]
  • REGCEB=[REGCEB_INV:0] [REGCEB:3]
  • RSTA=[RSTA:3] [RSTA_INV:0]
  • RSTB=[RSTB:3] [RSTB_INV:0]
  • WEA0=[WEA0:3] [WEA0_INV:0]
  • WEA1=[WEA1:3] [WEA1_INV:0]
  • WEA2=[WEA2:3] [WEA2_INV:0]
  • WEA3=[WEA3_INV:0] [WEA3:3]
  • WEB0=[WEB0:3] [WEB0_INV:0]
  • WEB1=[WEB1:3] [WEB1_INV:0]
  • WEB2=[WEB2_INV:0] [WEB2:3]
  • WEB3=[WEB3:3] [WEB3_INV:0]
RAMB16BWER_RAMB16BWER
  • CLKA=[CLKA_INV:0] [CLKA:3]
  • CLKB=[CLKB_INV:0] [CLKB:3]
  • DATA_WIDTH_A=[18:2] [36:1]
  • DATA_WIDTH_B=[18:2] [36:1]
  • DOA_REG=[0:3]
  • DOB_REG=[0:3]
  • ENA=[ENA_INV:0] [ENA:3]
  • ENB=[ENB_INV:0] [ENB:3]
  • EN_RSTRAM_A=[TRUE:3]
  • EN_RSTRAM_B=[TRUE:3]
  • RAM_MODE=[TDP:3]
  • REGCEA=[REGCEA_INV:0] [REGCEA:3]
  • REGCEB=[REGCEB_INV:0] [REGCEB:3]
  • RSTA=[RSTA:3] [RSTA_INV:0]
  • RSTB=[RSTB:3] [RSTB_INV:0]
  • RSTTYPE=[SYNC:3]
  • RST_PRIORITY_A=[CE:3]
  • RST_PRIORITY_B=[CE:3]
  • WEA0=[WEA0:3] [WEA0_INV:0]
  • WEA1=[WEA1:3] [WEA1_INV:0]
  • WEA2=[WEA2:3] [WEA2_INV:0]
  • WEA3=[WEA3_INV:0] [WEA3:3]
  • WEB0=[WEB0:3] [WEB0_INV:0]
  • WEB1=[WEB1:3] [WEB1_INV:0]
  • WEB2=[WEB2_INV:0] [WEB2:3]
  • WEB3=[WEB3:3] [WEB3_INV:0]
  • WRITE_MODE_A=[WRITE_FIRST:1] [READ_FIRST:2]
  • WRITE_MODE_B=[WRITE_FIRST:3]
RAMB8BWER
  • CLKAWRCLK=[CLKAWRCLK:8] [CLKAWRCLK_INV:0]
  • CLKBRDCLK=[CLKBRDCLK_INV:0] [CLKBRDCLK:8]
  • ENAWREN=[ENAWREN:8] [ENAWREN_INV:0]
  • ENBRDEN=[ENBRDEN_INV:0] [ENBRDEN:8]
  • REGCEA=[REGCEA_INV:0] [REGCEA:8]
  • REGCEBREGCE=[REGCEBREGCE_INV:0] [REGCEBREGCE:8]
  • RSTA=[RSTA:8] [RSTA_INV:0]
  • RSTBRST=[RSTBRST:8] [RSTBRST_INV:0]
  • WEAWEL0=[WEAWEL0:8] [WEAWEL0_INV:0]
  • WEAWEL1=[WEAWEL1_INV:0] [WEAWEL1:8]
  • WEBWEU0=[WEBWEU0:8] [WEBWEU0_INV:0]
  • WEBWEU1=[WEBWEU1:8] [WEBWEU1_INV:0]
RAMB8BWER_RAMB8BWER
  • CLKAWRCLK=[CLKAWRCLK:8] [CLKAWRCLK_INV:0]
  • CLKBRDCLK=[CLKBRDCLK_INV:0] [CLKBRDCLK:8]
  • DATA_WIDTH_A=[9:4] [36:4]
  • DATA_WIDTH_B=[9:4] [36:4]
  • DOA_REG=[0:7] [1:1]
  • DOB_REG=[0:7] [1:1]
  • ENAWREN=[ENAWREN:8] [ENAWREN_INV:0]
  • ENBRDEN=[ENBRDEN_INV:0] [ENBRDEN:8]
  • EN_RSTRAM_A=[TRUE:8]
  • EN_RSTRAM_B=[TRUE:8]
  • RAM_MODE=[TDP:4] [SDP:4]
  • REGCEA=[REGCEA_INV:0] [REGCEA:8]
  • REGCEBREGCE=[REGCEBREGCE_INV:0] [REGCEBREGCE:8]
  • RSTA=[RSTA:8] [RSTA_INV:0]
  • RSTBRST=[RSTBRST:8] [RSTBRST_INV:0]
  • RSTTYPE=[SYNC:8]
  • RST_PRIORITY_A=[CE:8]
  • RST_PRIORITY_B=[CE:8]
  • WEAWEL0=[WEAWEL0:8] [WEAWEL0_INV:0]
  • WEAWEL1=[WEAWEL1_INV:0] [WEAWEL1:8]
  • WEBWEU0=[WEBWEU0:8] [WEBWEU0_INV:0]
  • WEBWEU1=[WEBWEU1:8] [WEBWEU1_INV:0]
  • WRITE_MODE_A=[READ_FIRST:8]
  • WRITE_MODE_B=[WRITE_FIRST:4] [READ_FIRST:4]
REG_SR
  • CK=[CK:2858] [CK_INV:0]
  • LATCH_OR_FF=[FF:2858]
  • SRINIT=[SRINIT0:2829] [SRINIT1:29]
  • SYNC_ATTR=[ASYNC:2657] [SYNC:201]
SLICEL
  • CLK=[CLK:139] [CLK_INV:0]
SLICEM
  • CLK=[CLK:145] [CLK_INV:0]
SLICEX
  • CLK=[CLK:895] [CLK_INV:0]
 
Pin Data
BUFG
  • I0=5
  • O=5
BUFG_BUFG
  • I0=5
  • O=5
BUFIO2
  • DIVCLK=2
  • I=2
BUFIO2FB
  • I=2
  • O=2
BUFIO2FB_BUFIO2FB
  • I=2
  • O=2
BUFIO2_BUFIO2
  • DIVCLK=2
  • I=2
CARRY4
  • CIN=129
  • CO0=2
  • CO1=6
  • CO2=4
  • CO3=130
  • CYINIT=34
  • DI0=160
  • DI1=156
  • DI2=149
  • DI3=130
  • O0=137
  • O1=136
  • O2=133
  • O3=131
  • S0=163
  • S1=159
  • S2=151
  • S3=146
DCM
  • CLK0=1
  • CLKDV=1
  • CLKFB=1
  • CLKIN=1
  • PSCLK=1
  • PSEN=1
  • PSINCDEC=1
  • RST=1
DCM_DCM
  • CLK0=1
  • CLKDV=1
  • CLKFB=1
  • CLKIN=1
  • PSCLK=1
  • PSEN=1
  • PSINCDEC=1
  • RST=1
DSP48A1
  • A0=4
  • A1=4
  • A10=4
  • A11=4
  • A12=4
  • A13=4
  • A14=4
  • A15=4
  • A16=4
  • A17=4
  • A2=4
  • A3=4
  • A4=4
  • A5=4
  • A6=4
  • A7=4
  • A8=4
  • A9=4
  • B0=4
  • B1=4
  • B10=4
  • B11=4
  • B12=4
  • B13=4
  • B14=4
  • B15=4
  • B16=4
  • B17=4
  • B2=4
  • B3=4
  • B4=4
  • B5=4
  • B6=4
  • B7=4
  • B8=4
  • B9=4
  • C0=4
  • C1=4
  • C10=4
  • C11=4
  • C12=4
  • C13=4
  • C14=4
  • C15=4
  • C16=4
  • C17=4
  • C18=4
  • C19=4
  • C2=4
  • C20=4
  • C21=4
  • C22=4
  • C23=4
  • C24=4
  • C25=4
  • C26=4
  • C27=4
  • C28=4
  • C29=4
  • C3=4
  • C30=4
  • C31=4
  • C32=4
  • C33=4
  • C34=4
  • C35=4
  • C36=4
  • C37=4
  • C38=4
  • C39=4
  • C4=4
  • C40=4
  • C41=4
  • C42=4
  • C43=4
  • C44=4
  • C45=4
  • C46=4
  • C47=4
  • C5=4
  • C6=4
  • C7=4
  • C8=4
  • C9=4
  • CEA=4
  • CEB=4
  • CEC=4
  • CECARRYIN=4
  • CED=4
  • CEM=4
  • CEOPMODE=4
  • CEP=4
  • CLK=4
  • D0=4
  • D1=4
  • D10=4
  • D11=4
  • D12=4
  • D13=4
  • D14=4
  • D15=4
  • D16=4
  • D17=4
  • D2=4
  • D3=4
  • D4=4
  • D5=4
  • D6=4
  • D7=4
  • D8=4
  • D9=4
  • M0=3
  • M1=3
  • M10=3
  • M11=3
  • M12=3
  • M13=3
  • M14=3
  • M15=3
  • M16=3
  • M17=3
  • M18=3
  • M19=3
  • M2=3
  • M20=3
  • M21=3
  • M22=3
  • M23=3
  • M24=3
  • M25=3
  • M26=3
  • M27=3
  • M28=3
  • M29=3
  • M3=3
  • M30=3
  • M31=3
  • M32=2
  • M33=2
  • M4=3
  • M5=3
  • M6=3
  • M7=3
  • M8=3
  • M9=3
  • OPMODE0=4
  • OPMODE1=4
  • OPMODE2=4
  • OPMODE3=4
  • OPMODE4=4
  • OPMODE5=4
  • OPMODE6=4
  • OPMODE7=4
  • P0=1
  • P1=1
  • P10=1
  • P11=1
  • P12=1
  • P13=1
  • P14=1
  • P15=1
  • P16=1
  • P17=1
  • P18=1
  • P19=1
  • P2=1
  • P20=1
  • P21=1
  • P22=1
  • P23=1
  • P24=1
  • P25=1
  • P26=1
  • P27=1
  • P28=1
  • P29=1
  • P3=1
  • P30=1
  • P31=1
  • P4=1
  • P5=1
  • P6=1
  • P7=1
  • P8=1
  • P9=1
  • RSTA=4
  • RSTB=4
  • RSTC=4
  • RSTCARRYIN=4
  • RSTD=4
  • RSTM=4
  • RSTOPMODE=4
  • RSTP=4
DSP48A1_DSP48A1
  • A0=4
  • A1=4
  • A10=4
  • A11=4
  • A12=4
  • A13=4
  • A14=4
  • A15=4
  • A16=4
  • A17=4
  • A2=4
  • A3=4
  • A4=4
  • A5=4
  • A6=4
  • A7=4
  • A8=4
  • A9=4
  • B0=4
  • B1=4
  • B10=4
  • B11=4
  • B12=4
  • B13=4
  • B14=4
  • B15=4
  • B16=4
  • B17=4
  • B2=4
  • B3=4
  • B4=4
  • B5=4
  • B6=4
  • B7=4
  • B8=4
  • B9=4
  • C0=4
  • C1=4
  • C10=4
  • C11=4
  • C12=4
  • C13=4
  • C14=4
  • C15=4
  • C16=4
  • C17=4
  • C18=4
  • C19=4
  • C2=4
  • C20=4
  • C21=4
  • C22=4
  • C23=4
  • C24=4
  • C25=4
  • C26=4
  • C27=4
  • C28=4
  • C29=4
  • C3=4
  • C30=4
  • C31=4
  • C32=4
  • C33=4
  • C34=4
  • C35=4
  • C36=4
  • C37=4
  • C38=4
  • C39=4
  • C4=4
  • C40=4
  • C41=4
  • C42=4
  • C43=4
  • C44=4
  • C45=4
  • C46=4
  • C47=4
  • C5=4
  • C6=4
  • C7=4
  • C8=4
  • C9=4
  • CEA=4
  • CEB=4
  • CEC=4
  • CECARRYIN=4
  • CED=4
  • CEM=4
  • CEOPMODE=4
  • CEP=4
  • CLK=4
  • D0=4
  • D1=4
  • D10=4
  • D11=4
  • D12=4
  • D13=4
  • D14=4
  • D15=4
  • D16=4
  • D17=4
  • D2=4
  • D3=4
  • D4=4
  • D5=4
  • D6=4
  • D7=4
  • D8=4
  • D9=4
  • M0=3
  • M1=3
  • M10=3
  • M11=3
  • M12=3
  • M13=3
  • M14=3
  • M15=3
  • M16=3
  • M17=3
  • M18=3
  • M19=3
  • M2=3
  • M20=3
  • M21=3
  • M22=3
  • M23=3
  • M24=3
  • M25=3
  • M26=3
  • M27=3
  • M28=3
  • M29=3
  • M3=3
  • M30=3
  • M31=3
  • M32=2
  • M33=2
  • M4=3
  • M5=3
  • M6=3
  • M7=3
  • M8=3
  • M9=3
  • OPMODE0=4
  • OPMODE1=4
  • OPMODE2=4
  • OPMODE3=4
  • OPMODE4=4
  • OPMODE5=4
  • OPMODE6=4
  • OPMODE7=4
  • P0=1
  • P1=1
  • P10=1
  • P11=1
  • P12=1
  • P13=1
  • P14=1
  • P15=1
  • P16=1
  • P17=1
  • P18=1
  • P19=1
  • P2=1
  • P20=1
  • P21=1
  • P22=1
  • P23=1
  • P24=1
  • P25=1
  • P26=1
  • P27=1
  • P28=1
  • P29=1
  • P3=1
  • P30=1
  • P31=1
  • P4=1
  • P5=1
  • P6=1
  • P7=1
  • P8=1
  • P9=1
  • RSTA=4
  • RSTB=4
  • RSTC=4
  • RSTCARRYIN=4
  • RSTD=4
  • RSTM=4
  • RSTOPMODE=4
  • RSTP=4
FF_SR
  • CE=269
  • CK=370
  • D=370
  • Q=370
  • SR=98
HARD0
  • 0=19
HARD1
  • 1=11
IOB
  • I=30
  • O=68
  • PAD=98
IOB_IMUX
  • I=30
  • OUT=30
IOB_INBUF
  • OUT=30
  • PAD=30
IOB_OUTBUF
  • IN=68
  • OUT=68
LUT5
  • A1=413
  • A2=485
  • A3=526
  • A4=343
  • A5=301
  • O5=935
LUT6
  • A1=1624
  • A2=2298
  • A3=2879
  • A4=3227
  • A5=3294
  • A6=3442
  • O6=3454
LUT_OR_MEM5
  • A1=33
  • A2=33
  • A3=33
  • A4=33
  • A5=33
  • CLK=33
  • DI1=33
  • O5=33
  • WA1=28
  • WA2=28
  • WA3=28
  • WA4=28
  • WA5=28
  • WE=33
LUT_OR_MEM6
  • A1=569
  • A2=569
  • A3=569
  • A4=569
  • A5=569
  • A6=569
  • CLK=568
  • DI1=525
  • DI2=43
  • O6=556
  • WA1=552
  • WA2=552
  • WA3=552
  • WA4=552
  • WA5=552
  • WA6=552
  • WA7=512
  • WA8=512
  • WE=568
PAD
  • PAD=98
PLL_ADV
  • CLKFBIN=1
  • CLKFBOUT=1
  • CLKIN1=1
  • CLKOUT0=1
  • RST=1
PLL_ADV_PLL_ADV
  • CLKFBIN=1
  • CLKFBOUT=1
  • CLKIN1=1
  • CLKOUT0=1
  • RST=1
RAMB16BWER
  • ADDRA10=3
  • ADDRA11=3
  • ADDRA12=3
  • ADDRA13=3
  • ADDRA4=2
  • ADDRA5=3
  • ADDRA6=3
  • ADDRA7=3
  • ADDRA8=3
  • ADDRA9=3
  • ADDRB10=3
  • ADDRB11=3
  • ADDRB12=3
  • ADDRB13=3
  • ADDRB4=2
  • ADDRB5=3
  • ADDRB6=3
  • ADDRB7=3
  • ADDRB8=3
  • ADDRB9=3
  • CLKA=3
  • CLKB=3
  • DIA0=3
  • DIA1=3
  • DIA10=3
  • DIA11=3
  • DIA12=3
  • DIA13=3
  • DIA14=3
  • DIA15=3
  • DIA16=1
  • DIA17=1
  • DIA18=1
  • DIA19=1
  • DIA2=3
  • DIA20=1
  • DIA21=1
  • DIA22=1
  • DIA23=1
  • DIA24=1
  • DIA25=1
  • DIA26=1
  • DIA27=1
  • DIA28=1
  • DIA29=1
  • DIA3=3
  • DIA30=1
  • DIA31=1
  • DIA4=3
  • DIA5=3
  • DIA6=3
  • DIA7=3
  • DIA8=3
  • DIA9=3
  • DIPA0=3
  • DIPA1=3
  • DIPA2=1
  • DIPA3=1
  • DOB0=3
  • DOB1=3
  • DOB10=3
  • DOB11=3
  • DOB12=3
  • DOB13=3
  • DOB14=2
  • DOB15=2
  • DOB16=1
  • DOB17=1
  • DOB18=1
  • DOB19=1
  • DOB2=3
  • DOB20=1
  • DOB21=1
  • DOB22=1
  • DOB23=1
  • DOB24=1
  • DOB25=1
  • DOB26=1
  • DOB27=1
  • DOB28=1
  • DOB29=1
  • DOB3=3
  • DOB30=1
  • DOB31=1
  • DOB4=3
  • DOB5=3
  • DOB6=3
  • DOB7=3
  • DOB8=3
  • DOB9=3
  • DOPB0=2
  • DOPB1=1
  • ENA=3
  • ENB=3
  • REGCEA=3
  • REGCEB=3
  • RSTA=3
  • RSTB=3
  • WEA0=3
  • WEA1=3
  • WEA2=3
  • WEA3=3
  • WEB0=3
  • WEB1=3
  • WEB2=3
  • WEB3=3
RAMB16BWER_RAMB16BWER
  • ADDRA10=3
  • ADDRA11=3
  • ADDRA12=3
  • ADDRA13=3
  • ADDRA4=2
  • ADDRA5=3
  • ADDRA6=3
  • ADDRA7=3
  • ADDRA8=3
  • ADDRA9=3
  • ADDRB10=3
  • ADDRB11=3
  • ADDRB12=3
  • ADDRB13=3
  • ADDRB4=2
  • ADDRB5=3
  • ADDRB6=3
  • ADDRB7=3
  • ADDRB8=3
  • ADDRB9=3
  • CLKA=3
  • CLKB=3
  • DIA0=3
  • DIA1=3
  • DIA10=3
  • DIA11=3
  • DIA12=3
  • DIA13=3
  • DIA14=3
  • DIA15=3
  • DIA16=1
  • DIA17=1
  • DIA18=1
  • DIA19=1
  • DIA2=3
  • DIA20=1
  • DIA21=1
  • DIA22=1
  • DIA23=1
  • DIA24=1
  • DIA25=1
  • DIA26=1
  • DIA27=1
  • DIA28=1
  • DIA29=1
  • DIA3=3
  • DIA30=1
  • DIA31=1
  • DIA4=3
  • DIA5=3
  • DIA6=3
  • DIA7=3
  • DIA8=3
  • DIA9=3
  • DIPA0=3
  • DIPA1=3
  • DIPA2=1
  • DIPA3=1
  • DOB0=3
  • DOB1=3
  • DOB10=3
  • DOB11=3
  • DOB12=3
  • DOB13=3
  • DOB14=2
  • DOB15=2
  • DOB16=1
  • DOB17=1
  • DOB18=1
  • DOB19=1
  • DOB2=3
  • DOB20=1
  • DOB21=1
  • DOB22=1
  • DOB23=1
  • DOB24=1
  • DOB25=1
  • DOB26=1
  • DOB27=1
  • DOB28=1
  • DOB29=1
  • DOB3=3
  • DOB30=1
  • DOB31=1
  • DOB4=3
  • DOB5=3
  • DOB6=3
  • DOB7=3
  • DOB8=3
  • DOB9=3
  • DOPB0=2
  • DOPB1=1
  • ENA=3
  • ENB=3
  • REGCEA=3
  • REGCEB=3
  • RSTA=3
  • RSTB=3
  • WEA0=3
  • WEA1=3
  • WEA2=3
  • WEA3=3
  • WEB0=3
  • WEB1=3
  • WEB2=3
  • WEB3=3
RAMB8BWER
  • ADDRAWRADDR10=8
  • ADDRAWRADDR11=8
  • ADDRAWRADDR12=8
  • ADDRAWRADDR3=4
  • ADDRAWRADDR4=4
  • ADDRAWRADDR5=8
  • ADDRAWRADDR6=8
  • ADDRAWRADDR7=8
  • ADDRAWRADDR8=8
  • ADDRAWRADDR9=8
  • ADDRBRDADDR10=8
  • ADDRBRDADDR11=8
  • ADDRBRDADDR12=8
  • ADDRBRDADDR3=4
  • ADDRBRDADDR4=4
  • ADDRBRDADDR5=8
  • ADDRBRDADDR6=8
  • ADDRBRDADDR7=8
  • ADDRBRDADDR8=8
  • ADDRBRDADDR9=8
  • CLKAWRCLK=8
  • CLKBRDCLK=8
  • DIADI0=8
  • DIADI1=8
  • DIADI10=4
  • DIADI11=4
  • DIADI12=4
  • DIADI13=4
  • DIADI14=4
  • DIADI15=4
  • DIADI2=8
  • DIADI3=8
  • DIADI4=8
  • DIADI5=8
  • DIADI6=8
  • DIADI7=8
  • DIADI8=4
  • DIADI9=4
  • DIBDI0=4
  • DIBDI1=4
  • DIBDI10=2
  • DIBDI11=2
  • DIBDI12=2
  • DIBDI13=2
  • DIBDI14=2
  • DIBDI15=2
  • DIBDI2=4
  • DIBDI3=4
  • DIBDI4=4
  • DIBDI5=4
  • DIBDI6=2
  • DIBDI7=2
  • DIBDI8=2
  • DIBDI9=2
  • DIPADIP0=4
  • DOADO0=4
  • DOADO1=4
  • DOADO10=4
  • DOADO11=4
  • DOADO12=4
  • DOADO13=4
  • DOADO14=4
  • DOADO15=4
  • DOADO2=4
  • DOADO3=4
  • DOADO4=4
  • DOADO5=4
  • DOADO6=4
  • DOADO7=4
  • DOADO8=4
  • DOADO9=4
  • DOBDO0=8
  • DOBDO1=8
  • DOBDO10=2
  • DOBDO11=2
  • DOBDO12=2
  • DOBDO13=2
  • DOBDO14=2
  • DOBDO15=2
  • DOBDO2=8
  • DOBDO3=8
  • DOBDO4=8
  • DOBDO5=8
  • DOBDO6=6
  • DOBDO7=6
  • DOBDO8=2
  • DOBDO9=2
  • ENAWREN=8
  • ENBRDEN=8
  • REGCEA=8
  • REGCEBREGCE=8
  • RSTA=8
  • RSTBRST=8
  • WEAWEL0=8
  • WEAWEL1=8
  • WEBWEU0=8
  • WEBWEU1=8
RAMB8BWER_RAMB8BWER
  • ADDRAWRADDR10=8
  • ADDRAWRADDR11=8
  • ADDRAWRADDR12=8
  • ADDRAWRADDR3=4
  • ADDRAWRADDR4=4
  • ADDRAWRADDR5=8
  • ADDRAWRADDR6=8
  • ADDRAWRADDR7=8
  • ADDRAWRADDR8=8
  • ADDRAWRADDR9=8
  • ADDRBRDADDR10=8
  • ADDRBRDADDR11=8
  • ADDRBRDADDR12=8
  • ADDRBRDADDR3=4
  • ADDRBRDADDR4=4
  • ADDRBRDADDR5=8
  • ADDRBRDADDR6=8
  • ADDRBRDADDR7=8
  • ADDRBRDADDR8=8
  • ADDRBRDADDR9=8
  • CLKAWRCLK=8
  • CLKBRDCLK=8
  • DIADI0=8
  • DIADI1=8
  • DIADI10=4
  • DIADI11=4
  • DIADI12=4
  • DIADI13=4
  • DIADI14=4
  • DIADI15=4
  • DIADI2=8
  • DIADI3=8
  • DIADI4=8
  • DIADI5=8
  • DIADI6=8
  • DIADI7=8
  • DIADI8=4
  • DIADI9=4
  • DIBDI0=4
  • DIBDI1=4
  • DIBDI10=2
  • DIBDI11=2
  • DIBDI12=2
  • DIBDI13=2
  • DIBDI14=2
  • DIBDI15=2
  • DIBDI2=4
  • DIBDI3=4
  • DIBDI4=4
  • DIBDI5=4
  • DIBDI6=2
  • DIBDI7=2
  • DIBDI8=2
  • DIBDI9=2
  • DIPADIP0=4
  • DOADO0=4
  • DOADO1=4
  • DOADO10=4
  • DOADO11=4
  • DOADO12=4
  • DOADO13=4
  • DOADO14=4
  • DOADO15=4
  • DOADO2=4
  • DOADO3=4
  • DOADO4=4
  • DOADO5=4
  • DOADO6=4
  • DOADO7=4
  • DOADO8=4
  • DOADO9=4
  • DOBDO0=8
  • DOBDO1=8
  • DOBDO10=2
  • DOBDO11=2
  • DOBDO12=2
  • DOBDO13=2
  • DOBDO14=2
  • DOBDO15=2
  • DOBDO2=8
  • DOBDO3=8
  • DOBDO4=8
  • DOBDO5=8
  • DOBDO6=6
  • DOBDO7=6
  • DOBDO8=2
  • DOBDO9=2
  • ENAWREN=8
  • ENBRDEN=8
  • REGCEA=8
  • REGCEBREGCE=8
  • RSTA=8
  • RSTBRST=8
  • WEAWEL0=8
  • WEAWEL1=8
  • WEBWEU0=8
  • WEBWEU1=8
REG_SR
  • CE=2309
  • CK=2858
  • D=2858
  • Q=2858
  • SR=739
SELMUX2_1
  • 0=413
  • 1=413
  • OUT=413
  • S0=413
SLICEL
  • A=12
  • A1=53
  • A2=81
  • A3=98
  • A4=140
  • A5=145
  • A6=181
  • AMUX=66
  • AQ=115
  • AX=94
  • B=23
  • B1=56
  • B2=83
  • B3=100
  • B4=142
  • B5=149
  • B6=182
  • BMUX=71
  • BQ=110
  • BX=84
  • C=1
  • C1=52
  • C2=88
  • C3=107
  • C4=144
  • C5=150
  • C6=183
  • CE=120
  • CIN=129
  • CLK=139
  • CMUX=83
  • COUT=129
  • CQ=117
  • CX=99
  • D=4
  • D1=54
  • D2=84
  • D3=104
  • D4=141
  • D5=146
  • D6=174
  • DMUX=61
  • DQ=110
  • DX=74
  • SR=50
SLICEM
  • A=1
  • A1=144
  • A2=144
  • A3=144
  • A4=144
  • A5=144
  • A6=144
  • AI=12
  • AMUX=9
  • AQ=17
  • AX=142
  • B=1
  • B1=143
  • B2=143
  • B3=143
  • B4=143
  • B5=143
  • B6=143
  • BI=11
  • BMUX=136
  • BQ=15
  • BX=138
  • C1=142
  • C2=142
  • C3=142
  • C4=142
  • C5=142
  • C6=142
  • CE=145
  • CI=11
  • CLK=145
  • CMUX=8
  • CQ=12
  • CX=140
  • D1=140
  • D2=140
  • D3=140
  • D4=140
  • D5=140
  • D6=140
  • DI=9
  • DMUX=8
  • DQ=3
  • DX=140
  • SR=1
  • WE=6
SLICEX
  • A=514
  • A1=569
  • A2=713
  • A3=802
  • A4=849
  • A5=858
  • A6=854
  • AMUX=169
  • AQ=733
  • AX=302
  • B=498
  • B1=490
  • B2=635
  • B3=707
  • B4=742
  • B5=755
  • B6=754
  • BMUX=146
  • BQ=590
  • BX=267
  • C=314
  • C1=380
  • C2=495
  • C3=546
  • C4=576
  • C5=589
  • C6=583
  • CE=678
  • CLK=895
  • CMUX=129
  • CQ=568
  • CX=243
  • D=325
  • D1=331
  • D2=444
  • D3=493
  • D4=521
  • D5=535
  • D6=531
  • DMUX=110
  • DQ=468
  • DX=223
  • SR=260
 
Tool Usage
Command Line History
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -i -p xc6slx9-csg324-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -i -p xc6slx9-csg324-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -i -p xc6slx9-csg324-3 <fname>.ngc <fname>.ngd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -i -p xc6slx9-csg324-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
Program NameRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
bitgen 2 2 0 0 0 0 0
map 5 5 0 0 0 0 0
ngdbuild 6 6 0 0 0 0 0
par 5 5 0 0 0 0 0
trce 5 5 0 0 0 0 0
xst 6 6 0 0 0 0 0
 
Project Statistics
PROP_Enable_Message_Filtering=false PROP_FitterReportFormat=HTML
PROP_LastAppliedGoal=Balanced PROP_LastAppliedStrategy=Xilinx Default (unlocked)
PROP_ManualCompileOrderImp=false PROP_PropSpecInProjFile=Store all values
PROP_Simulator=ISim (VHDL/Verilog) PROP_SynthTopFile=changed
PROP_Top_Level_Module_Type=HDL PROP_UseSmartGuide=false
PROP_UserConstraintEditorPreference=Text Editor PROP_intProjectCreationTimestamp=2018-12-26T09:50:33
PROP_intWbtProjectID=FF2AC3C0A6854FDD93A0F3A5EC647663 PROP_intWbtProjectIteration=9
PROP_intWorkingDirLocWRTProjDir=Same PROP_intWorkingDirUsed=No
PROP_xilxBitgStart_IntDone=true PROP_AutoTop=false
PROP_CompxlibEdkSimLib=false PROP_DevFamily=Spartan6
PROP_xilxBitgCfg_GenOpt_BinaryFile=true PROP_DevDevice=xc6slx9
PROP_DevFamilyPMName=spartan6 PROP_DevPackage=csg324
PROP_Synthesis_Tool=XST (VHDL/Verilog) PROP_DevSpeed=-3
PROP_PreferredLanguage=Verilog FILE_COREGEN=2
FILE_VERILOG=2
 
Core Statistics
Core Type=clk_wiz_v3_6
clkin1_period=10.0 clkin2_period=10.0 clock_mgr_type=AUTO feedback_source=FDBK_AUTO
feedback_type=SINGLE manual_override=false num_out_clk=1 primtype_sel=DCM_SP
use_clk_valid=false use_dyn_phase_shift=false use_dyn_reconfig=false use_freeze=false
use_inclk_stopped=false use_inclk_switchover=false use_locked=true use_max_i_jitter=false
use_min_o_jitter=false use_phase_alignment=true use_power_down=false use_reset=true
use_status=false
Core Type=clk_wiz_v3_6
clkin1_period=10.000 clkin2_period=10.000 clock_mgr_type=AUTO feedback_source=FDBK_AUTO
feedback_type=SINGLE manual_override=false num_out_clk=1 primtype_sel=PLL_BASE
use_clk_valid=false use_dyn_phase_shift=false use_dyn_reconfig=false use_freeze=false
use_inclk_stopped=false use_inclk_switchover=false use_locked=true use_max_i_jitter=false
use_min_o_jitter=false use_phase_alignment=true use_power_down=false use_reset=true
use_status=false
 
Unisim Statistics
XST_UNISIM_SUMMARY
XST_NUM_BUFG=1 XST_NUM_IBUFG=1
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=4 NGDBUILD_NUM_BUFGP=1 NGDBUILD_NUM_DCM_SP=1 NGDBUILD_NUM_DSP48A1=4
NGDBUILD_NUM_FD=158 NGDBUILD_NUM_FDC=377 NGDBUILD_NUM_FDCE=215 NGDBUILD_NUM_FDE=2229
NGDBUILD_NUM_FDP=14 NGDBUILD_NUM_FDPE=13 NGDBUILD_NUM_FDR=38 NGDBUILD_NUM_FDRE=181
NGDBUILD_NUM_FDSE=3 NGDBUILD_NUM_GND=1 NGDBUILD_NUM_IBUF=27 NGDBUILD_NUM_IBUFG=2
NGDBUILD_NUM_INV=40 NGDBUILD_NUM_LUT1=187 NGDBUILD_NUM_LUT2=264 NGDBUILD_NUM_LUT3=809
NGDBUILD_NUM_LUT4=479 NGDBUILD_NUM_LUT5=674 NGDBUILD_NUM_LUT6=1571 NGDBUILD_NUM_MUXCY=595
NGDBUILD_NUM_MUXF7=29 NGDBUILD_NUM_OBUF=68 NGDBUILD_NUM_RAM16X1D=6 NGDBUILD_NUM_RAM256X1S=128
NGDBUILD_NUM_RAM32M=7 NGDBUILD_NUM_RAMB16BWER=3 NGDBUILD_NUM_RAMB8BWER=8 NGDBUILD_NUM_SRLC16E=20
NGDBUILD_NUM_SRLC32E=1 NGDBUILD_NUM_VCC=1 NGDBUILD_NUM_XORCY=537
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=5 NGDBUILD_NUM_DCM_SP=1 NGDBUILD_NUM_DSP48A1=4 NGDBUILD_NUM_FD=158
NGDBUILD_NUM_FDC=377 NGDBUILD_NUM_FDCE=215 NGDBUILD_NUM_FDE=2229 NGDBUILD_NUM_FDP=14
NGDBUILD_NUM_FDPE=13 NGDBUILD_NUM_FDR=38 NGDBUILD_NUM_FDRE=181 NGDBUILD_NUM_FDSE=3
NGDBUILD_NUM_GND=1 NGDBUILD_NUM_IBUF=27 NGDBUILD_NUM_IBUFG=3 NGDBUILD_NUM_INV=40
NGDBUILD_NUM_LUT1=187 NGDBUILD_NUM_LUT2=264 NGDBUILD_NUM_LUT3=809 NGDBUILD_NUM_LUT4=479
NGDBUILD_NUM_LUT5=674 NGDBUILD_NUM_LUT6=1571 NGDBUILD_NUM_MUXCY=595 NGDBUILD_NUM_MUXF7=29
NGDBUILD_NUM_OBUF=68 NGDBUILD_NUM_PLL_ADV=1 NGDBUILD_NUM_RAM256X1S=128 NGDBUILD_NUM_RAM32M=7
NGDBUILD_NUM_RAMB16BWER=3 NGDBUILD_NUM_RAMB8BWER=8 NGDBUILD_NUM_SRLC16E=20 NGDBUILD_NUM_SRLC32E=1
NGDBUILD_NUM_VCC=1 NGDBUILD_NUM_XORCY=537
 
XST Command Line Options
XST_OPTION_SUMMARY
-ifn=<fname>.prj -ofn=<design_top> -ofmt=NGC -p=xc6slx9-3-csg324
-top=<design_top> -opt_mode=Speed -opt_level=1 -power=NO
-iuc=NO -keep_hierarchy=No -netlist_hierarchy=As_Optimized -rtlview=Yes
-glob_opt=AllClockNets -read_cores=YES -sd=<No customer specific name> -write_timing_constraints=NO
-cross_clock_analysis=NO -bus_delimiter=<> -slice_utilization_ratio=100 -bram_utilization_ratio=100
-dsp_utilization_ratio=100 -reduce_control_sets=Auto -fsm_extract=YES -fsm_encoding=Auto
-safe_implementation=No -fsm_style=LUT -ram_extract=Yes -ram_style=Auto
-rom_extract=Yes -shreg_extract=YES -rom_style=Auto -auto_bram_packing=NO
-resource_sharing=YES -async_to_sync=NO -use_dsp48=Auto -iobuf=YES
-max_fanout=100000 -bufg=16 -register_duplication=YES -register_balancing=No
-optimize_primitives=NO -use_clock_enable=Auto -use_sync_set=Auto -use_sync_reset=Auto
-iob=Auto -equivalent_register_removal=YES -slice_utilization_ratio_maxmargin=5