Digital oscilloscope Project

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ze_dib

Joined: 06 Jan 2003
Posts: 82
Location: France

18 Feb 2003 13:33 fpga oscilloscope

Hi

I 'm studying possibilities to make a digital oscilloscope for PC, with onboard RAM to memorize samples.

I have several questions :
=> Wich bus is the easier to use (hard and driver for linux/windows) : PCI, USB or IEEE1394
=> I though about using many low speed ADC (cheapier) to reach sampling frequency I 'd like to use, is it a good way to do this.

Which FPGA would be the most suitable for that project SpartanII, or APEX20k

TOTO2001

ee_freak

Joined: 28 May 2001
Posts: 28
Location: somewhere in time

18 Feb 2003 14:48 usb oscilloscope project

Try www.bitscope.com . They use PIC with CPLD.

MADURAN

Joined: 01 Jan 1970
Posts: 66
Helped: 2
Location: Romania

18 Feb 2003 14:56 avr scope

http://www.chocbar.demon.co.uk/

ze_dib

Joined: 06 Jan 2003
Posts: 82
Location: France

18 Feb 2003 15:08 oscilloscope project

Thank a lot for those usefull Links

I think the second one is near of what i'd like to design.

I'd rather use PC SDRAM memory to allow storage of samples, cheap solution with a FPGA.

Toto2001

dsp_

Joined: 02 Mar 2002
Posts: 66
Helped: 3
Location: right here ... right now ...

18 Feb 2003 15:38 digital oscilloscope schematic

hi toto
look for "time interleaved sampling" or "interleaved sampling adc" on google

theres an app note on this subject on the maxim homepage
http://www.maxim-ic.com/appnotes.cfm/appnote_number/384

but maybe this is not the best approach for hobby purposes

Maxim wrote:

Unfortunately, this approach is complex and entails extra cost, a lengthy calibration, and mathematical analysis.

HTH
dsp_

ze_dib

Joined: 06 Jan 2003
Posts: 82
Location: France

18 Feb 2003 17:25 digital oscilloscope project

Thank for the application note.

It's almost what I was thinking about.

Could a FPGA assume the clock for ADC sampling, I mean do you think the jitter on Clock signal would be acceptable for such a thing

Thank for the anwers Smile

hugo

Joined: 01 Jan 1970
Posts: 286
Helped: 27
Location: canada

19 Feb 2003 2:36 jyetech oscilloscope

This link could be useful :

http://www.mccord.plus.com/FYP/final_report.htm

(Implementation of a low-cost PC based quad channel real-time / storage oscilloscope).

ze_dib

Joined: 06 Jan 2003
Posts: 82
Location: France

19 Feb 2003 14:38 pc oscilloscope schematic

In fact, I'not really looking for a low cost oscilloscope,

It' rather a high speed oscilloscope at lower cost, based on FPGA in order to allows configurable sampling and filtering frequency, configurable sample width and number of samples. I'm particularly intrested in the possibility to make hardware digital processing before storage.

I also plan to use PC memory to lower the cost of data storage.

I don't which High speed pc bus (PCI, USB and firewire) is the easist to implement (with a chip or in fpga) and the cheapier.

Here it is

Toto2001

Gunship

Joined: 31 Dec 2001
Posts: 52
Helped: 3

21 Feb 2003 18:57 oscilloscope schematic

toto2001 wrote:

For PCI, you usually buy a chip for the interface or a core and put into the FPGA. It will probably give you the fastest transfer of data between the scope portion of the FPGA and the PC. But doing a good high speed PCI can be difficult. Also, the design is not portable. (You need to move the entire PC around.)

USB is good especially with USB 2.0. It is very good speed. You can purchase a USB chip that can come with all the driver development tool you need. The design is also portable. If you need to move the scope around to another lab, this is a better choice.

I don't know too much about Firewire except used it on a few occassion. Mainly for Digital Video stuff. I will not recommended this interface for scope. I don't think it is ever used for instrumentation purpose.

Anyway, just my 2 cents. Hope that help.

Gunship

DrShoe

Joined: 16 Apr 2001
Posts: 35
Location: Netherlands

24 Feb 2003 22:36 usb oscilloscope schematic

The AD9283BRS-100 is a AD converter in the $6 range, free samples.

8-Bit, 50 MSPS/80 MSPS/100 MSPS ADC

ze_dib

Joined: 06 Jan 2003
Posts: 82
Location: France

25 Feb 2003 12:51 oscilloscope projects

Thank for all those usefull advice.

I had now a better view of what will be the project.

In my firts mind, I was looking for PCI, but the mobility is an argument I didn't think about.

The USB 2/1.1 seem a beter choice in the sense that it allow to be plug on a PC, a mac...
It will just take a little longer to set the filters parameter and to back up all the data to the computer, but it may be easier to do too !!!

If people are interested in taking part in it, they 're welcome

TOTO2001

mbyka

Joined: 12 May 2002
Posts: 509
Helped: 1

01 Mar 2003 15:28 pc oscilloscope project

http://alternatezone.com/electronics/dsoamk3.htm

ISSUE 97
August 1998
Theme: DEBUGGING TECHNIQUES

Task Manager—Almost Made 100, Ken Davidson, 2.
Reader I/O, 6.
New Product News, 8.
Bitscope—A Mixed-Signal Capture Engine, by Norman Jackson, 12.
http://www.circuitcellar.com/library/toc.asp

mbyka

Joined: 12 May 2002
Posts: 509
Helped: 1

01 Mar 2003 22:43 oscilloscope adc

http://www.vitrum.cz/snail/bitscope.htm
http://www.vitrum.cz/snail/products.htm#BITSCOPE

or ftp.circuitcellar.com 21 Anonyymoue \ftp.circuitcellar.com\Circuit_Cellar\1988\Issue_5
ftp.circuitcellar.com\Circuit_Cellar\1992\Issue_25
ftp.circuitcellar.com\Circuit_Cellar\1998\Issue_97

Goliath

Joined: 26 Mar 2002
Posts: 23
Helped: 1

23 Mar 2003 16:46 oscilloscope fpga

You could also have a look at the following link

http://www.johann-glaser.at/projects/DSO/

Goliath

RF_Router

Joined: 01 Feb 2002
Posts: 47

23 Mar 2003 18:16 oscilloscope front end

I think that the bus of your chose should be mainly decided by your sampling rate. What is the maximum rate that you would like to sample? And you can go from there? Just bar in mind that your sampling rate should be at least 2.5 times more and also you should make sure that your sampling don't vary. You wouldn't want to be involved in a varying sampling system cause it is too complicated to handle so usually if you want to make sure that, then you might want to have some sort of a buffer mechanism between your PC and your board.

Enjoy,
RF_Router

Sobakava

Joined: 27 Mar 2002
Posts: 367

27 Mar 2003 8:02 dso schematic

If you don't need deep memory, just generate two video rams
to store pal or ntsc image and fill this memory with the graphic
that you want to display. (scope graph) and generate standart
video signal with this data. It is useful if you don't want to use
a computer with your oscilloscope....

Google
AdSense
Google Adsense

27 Mar 2003 8:02 Ads

qinqiuer

Joined: 27 Mar 2003
Posts: 3

31 Mar 2003 16:05 oscilloscope input stage

Goliath wrote:

You could also have a look at the following link

http://www.johann-glaser.at/projects/DSO/

Goliath

this plan is best one !!!

because it has a good solution in analog front-end!

and i think the usb is a good choice, but is complex

ME

Joined: 14 Mar 2002
Posts: 1523
Helped: 13

31 Mar 2003 20:38 pc oscilloscope circuit

There is an error in this schematic: http://www.johann-glaser.at/projects/DSO/schematic/MainSchematic.png

IIC pull up resistors at SDA and SCL should be connected to 3.3V and not 5V as shown in the lower left corner of the schematic. Both AN2131
and EEPROM is 3.3V types.

Make_Pic

Joined: 13 Apr 2002
Posts: 81
Helped: 1

13 Jun 2003 20:25 eoscope

Quote:

You could also have a look at the following link

http://www.johann-glaser.at/projects/DSO/

Goliath

This link has not the sources for FPGA!?

joilen

Joined: 08 Jun 2003
Posts: 6

15 Jun 2003 14:14 firewire oscilloscope

also check out www.fpga4fun.com, this guy has made a dso using a fpga, he's currently doing a tutorial on how he did it along with all the verilog code...

A

Make_Pic

Joined: 13 Apr 2002
Posts: 81
Helped: 1

15 Jun 2003 15:02 project oscilloscope

joilen: It is good information for me, but
I need any information about a stroboscopic method of the measurement for DSO!

Last edited by Make_Pic on 15 Jun 2003 16:54; edited 1 time in total

Make_Pic

Joined: 13 Apr 2002
Posts: 81
Helped: 1

15 Jun 2003 15:06 cpld oscilloscope

I need any information about a stroboscopic method of the measurement for DSO! The stroboscopic method allows to measure Frequencies up to about 3 GHz.

Last edited by Make_Pic on 15 Jun 2003 16:52; edited 1 time in total

xgnetto

Joined: 01 Jan 1970
Posts: 13

12 Sep 2003 15:59 pic oscilloscope project

another project link.

Confused

http://www.enetsystems.com/~lorenzo/scope/

enjoy!

Sobakava

Joined: 27 Mar 2002
Posts: 367

13 Oct 2003 11:29 dso project

" I need ideas about 'triggering' "

My design will be based on a simple
FPGA/CPLD or a fast Scenix SX + FIFOs.

If I don't need to implement "pre-triggering", I suppose I don't have to store samples all the time. Only a trigger signal from analog channel or external trigger channel is required to start acquisition of "n" samples with sampling rate
of "m" MPSP.

After filling FIFO, I'll start USB2.0 transfer with
CY7C68013 (Cypress EZ-USB2+8051 IC)

I want to know about triggering circuit. How can I do that in analog way?

I need to generate a pulse from specified level and specified edge (hi-to-lo or lo-to-hi) of the analog signal and then I'll set a flip-flop, and reset this flip flop after FIFO filled so I wont get repeatedly pulses for every matched level-edge during sampling.

For setting trigger level, I am thinking about using a DAC/digital potentiometer. Or If I do this after ADC, I can use 8 bit magnitude comparators...

May be I'm in wrong way. What do you think/recommend?

Aoxomox

Joined: 18 Jul 2001
Posts: 90

15 Oct 2003 21:51 digital storage oscilloscope project

If you don't want to pre trigger by storing samples in a circular buffer, why don't you implement a digital compare for the sampled AD value.
If you want to detect e.g. low to high transition you have first to wait that the AD input value becomes smaller than the trigger level. then you can reset your trigger pulse. the next time the ad value becomes equal or higher than this level you can set the trigger pulse.

the advantage of this way is you can implement a triggering unit without any additional analog hardware which can drift by temperature ans so on.
another advantage is you can implement schmitt triggering behaviour when having two independant levels for upper and lower AD value. To implement this with analoge matters you will have to build up two DACs or else.

Hope it helps,
aOxOmOx

phongwiroon

Joined: 08 Dec 2003
Posts: 32

08 Dec 2003 6:37 build digital oscilloscope

try to use gameboy for small oscilloscope

Aoxomox

Joined: 18 Jul 2001
Posts: 90

25 Dec 2003 21:21 jyetech.com

Has anyone schematic or principle of an oscilloscope input section??

mainly with the following requeirements:

- high BW
- high impedance
- low distortion
- low noise / high sensitivity

Any suggestions for a good HF input attenuator circuit??

Any help is appreciated.

martingn

Joined: 30 Mar 2004
Posts: 40

13 Apr 2004 14:11 usb scope project

Hi people,

Could anybody go forward and build something?
Any interesting to share ??

Regards,

MArtin

Cluricaun

Joined: 28 Sep 2001
Posts: 704
Helped: 13

08 May 2004 17:50 usb oscilloscope schematics

Hi

I have a bitscope since a couple of years, and now I like to make a update to the communication between PC and bitscope. They (Bitscope) sell a ethernet-RS232 and one highspeed USB-RS232 adapter. I think they are a bit to expencive to order, must add custom tax and VAT. So I wonder if there are any projects I can use to get either a USB or Ethernet adapter, PIC code or sch.

More info here:

www.bitscope.net/store/?p=view&i=item+0
www.bitscope.net/store/?p=view&i=item+1

Thanks in advance for any help
Cl