detectiong positive edge and negative edge of a waveform

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ASIC_intl

Joined: 18 Jan 2008
Posts: 199

13 Aug 2008 6:32 detectiong positive edge and negative edge of a waveform

Supose a square waveform is coming . How will you detect the positive edge and negative edge of the waveform? Provide the circuits to detect the positive and negative edges.

ljxpjpjljx

Joined: 05 May 2008
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Location: Shang Hai

13 Aug 2008 6:43 Re: detectiong positive edge and negative edge of a waveform

use flip-flop , ok!

ASIC_intl

Joined: 18 Jan 2008
Posts: 199

13 Aug 2008 7:18 Re: detectiong positive edge and negative edge of a waveform

How will you use flip flop to detect a positive edge and also a negative edge? I think u will need circuitry for the porpose of detection of edges.

j_andr

Joined: 30 Mar 2008
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Location: europe

13 Aug 2008 9:50 Re: detectiong positive edge and negative edge of a waveform

ASIC_intl wrote:

How will you use flip flop to detect a positive edge and also a negative edge?/.../

you can use 2 FF, one triggered by a posedge, the second by a negedge
and an 'or' gate connected to both FF outputs;
or connect to an XOR gate the clock and clock delayed by several ns;

but I can hardly imagine a usage of such circuit if you test
a square wave -
you need a flag: "at least one pos/neg edge detected" ?
or a short positive pulse triggered by each slope ?
other ?
---

ASIC_intl

Joined: 18 Jan 2008
Posts: 199

13 Aug 2008 10:33 Re: detectiong positive edge and negative edge of a waveform

What will u fed tp the D-inputs of the flops? What will u fed to the clk inpus of the two flops? Where will u fed the square waveform whose inputs are to be detected?

j_andr

Joined: 30 Mar 2008
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Location: europe

13 Aug 2008 10:49 Re: detectiong positive edge and negative edge of a waveform

ASIC_intl wrote:

What will u fed tp the D-inputs of the flops?/.../

the solution depends on what you expect as an output;
draw a picture with the input(s) and required output;
or describe it more detailed;
---

ASIC_intl

Joined: 18 Jan 2008
Posts: 199

13 Aug 2008 11:15 Re: detectiong positive edge and negative edge of a waveform

I want to detect the positive and negative edges. That's WHAT I want wthatever the output is. Can u give what should be done more clearly by answering the previous question?

j_andr

Joined: 30 Mar 2008
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Location: europe

13 Aug 2008 11:59 Re: detectiong positive edge and negative edge of a waveform

detect slope - which output is expected ?

detectiong positive edge and negative edge of a waveform

counting ones - does it explain what I mean ?

---

Old Nick

Joined: 14 Sep 2007
Posts: 445
Helped: 49

13 Aug 2008 12:27 Re: detectiong positive edge and negative edge of a waveform

feed the square wave into a delay line (say 500ns delay), then feed the inputs of a 2 i/p exor gate with the original signal and the delayed signal. You'll then get a pulse 500ns long at every edge.

You can also use a comparator and an LPF (simple RC).

ASIC_intl

Joined: 18 Jan 2008
Posts: 199

13 Aug 2008 13:06 Re: detectiong positive edge and negative edge of a waveform

Hi

Are u suggesting to fed the waveform in the D-input of both the positive and negative edge triggered flops in case of detecting edges to generate the shown waveform form under detect_1. And also to send the outputs of both thflops to a two input or gate.

Do you work in any architecture group? What type of work do you do? What company are u working in?

j_andr

Joined: 30 Mar 2008
Posts: 107
Helped: 20
Location: europe

13 Aug 2008 13:29 Re: detectiong positive edge and negative edge of a waveform

ASIC_intl wrote:

Are u suggesting to fed the waveform/.../

no, I do not; and I did not;
mainly I tried to get any description of your req.'s from you;
and my answers 'quality' were as good as your specification;
you know the sentence - garbage in - garbage out;
it's not my fault that you assume everybody knows what you have
in mind;

Quote:

Do you work in any...

feel some sarcastic - well if you are really interested
I work in well known, large company in fpga area
and have some years of experience;
---

ASIC_intl

Joined: 18 Jan 2008
Posts: 199

13 Aug 2008 13:58 Re: detectiong positive edge and negative edge of a waveform

How will you decide about the frequency of the clock to detect the total number of '1' s in any bit pattern coming in your solution for getting no. of '1's?

About the problem of detecting edge I think now u have got the requirment.

Added after 8 minutes:

Hi

In your diagram both detect_1 and detect_2 are not proper outputs to detect both the edges. In case of detect_1 the waveform do not distinguish detection of positive and negative edges. In detect_2 the waveform only detects the positive edge and not the negative edge. So we need to decide about a proper output. It is not told to me/us the nature of the output waveform to detect both the edges. It is only told to find out the way of detection of both positive and negative edges.

Added after 17 minutes:

Hi OLD_NICK

What is the necessity of delaying the waveform. Even without delaying it can detect the positive edge. How will u detect negative edge?

j_andr

Joined: 30 Mar 2008
Posts: 107
Helped: 20
Location: europe

13 Aug 2008 14:09 Re: detectiong positive edge and negative edge of a waveform

ASIC_intl wrote:

/.../So we need to decide about a proper output/.../

exectly;
this is a question I asked couple of times - what output you need;

Quote:

waveform do not distinguish detection/.../

it's your task to decide how to code 'negative slope' and 'positive slope';
you can add one more bit as an output so you will have information
of the slope and the direction, you can code it as pulse length [more difficult],
you can code it as an output pulse shift;
in the option 2&3 you need a system clock that is at least 6x faster then
your tested waveform;
---

ASIC_intl

Joined: 18 Jan 2008
Posts: 199

13 Aug 2008 14:18 Re: detectiong positive edge and negative edge of a waveform

j_andr

I could not understand how you will distinguish between pos and neg edge. What do u mean by 2&3.?

What type of work do u do? Do you also decide architecture of circuits before writing RTLs and after specification?

Old Nick

Joined: 14 Sep 2007
Posts: 445
Helped: 49

13 Aug 2008 14:25 Re: detectiong positive edge and negative edge of a waveform

ASIC_intl wrote:

I'm not sure what you mean?

I have this very edge detection circuit working in a camera control system I've built, and it works a treat. The wave form is delayed, in order to allow the exor to detect edges (falling and rising). The period of delay gives the length of the pulse produced at each edge (adjust depending on the frequency of the square wave) - (it gives no indication on whether it was a falling or rising edge, just that there was an edge).
I'm not sure what you mean when you say 'it can detect a positive edge' without delaying. An exor gate cannot do that.
I'm not sure what exactly you're after, but if it is just to have a pulse indicating an edge, then an EXOR and delay line is as goosd a solution as I know.

ASIC_intl

Joined: 18 Jan 2008
Posts: 199

13 Aug 2008 14:40 Re: detectiong positive edge and negative edge of a waveform

Hi NICK

Please note that it is better if we can think of a circuit that can distinguish between both positive and negative edges.

Even if you fed the waveform in both the inputs of an EXOR gate , you will get a high pulse as soon as it detects a positive edge and it will remain high. IN this wany you will be capable of only detecting the positive edge.

j_andr

Joined: 30 Mar 2008
Posts: 107
Helped: 20
Location: europe

13 Aug 2008 14:42 Re: detectiong positive edge and negative edge of a waveform

ASIC_intl wrote:

I could not understand how you will distinguish/.../

btw. - if it's really a square wave - why you need to detect anything ?
you already have all information - the pos and neg edges;
your task makes sense if the 'square wave' is not square;

Quote:

What type of work do u do?

does it matter ? rtl, fpga implementation, verification;
---

Last edited by j_andr on 14 Aug 2008 7:48; edited 1 time in total

Old Nick

Joined: 14 Sep 2007
Posts: 445
Helped: 49

13 Aug 2008 14:49 Re: detectiong positive edge and negative edge of a waveform

ASIC_intl wrote:

I have been and am still using this circuit, and I can assure you that it works.

What you've said is quite wrong, draw the waveforms out (make sure you understand what an EXOR does) and you'll see.

Specify the problem properly, and you may get the answers you're looking for.
You can use the pulses in conjunction with the original clock signal to resolve whether it was a rising or falling edge that was detected at each pulse.

ASIC_intl

Joined: 18 Jan 2008
Posts: 199

14 Aug 2008 6:13 Re: detectiong positive edge and negative edge of a waveform

Hi j_andr

The detection will be more appropriate if you do not know about the input signal and you want to detect presence of positive and negative edges.
You are right here.

What I wrote above is more general. To make the problem simple weare first thinking of square wave as the input. And I want to detect its edges.

If you search in google about detection of edges you will find some patents on it.

In your ansawer as I understand you will distinguish the pos and neg edges by seeing their phase. What will be the phase value for pos edge and neg edge?

Added after 7 minutes:

Hi j_andr

I do architecture and placement and routing. Do u do architecture development?

do u have openings in your company for junior level engineers now?Hi

j_andr

Joined: 30 Mar 2008
Posts: 107
Helped: 20
Location: europe

14 Aug 2008 8:10 Re: detectiong positive edge and negative edge of a waveform

ASIC_intl wrote:

/.../

this discussion leads nowhere I'm afraid;
my last notes:
you have to have a clear view how the 'detected slope' signal/signals will be used;
this mainly determines the detection method;
I assume you need to trigger an action on a positive slope and a different
action on a negative one - so define logic sensitive on pos. edge and another
logic reacting on neg. edge and synchronize both later on to your system clock;

Quote:

do u have openings/.../

I do not work in HR
---

Last edited by j_andr on 14 Aug 2008 10:36; edited 1 time in total

ASIC_intl

Joined: 18 Jan 2008
Posts: 199

14 Aug 2008 12:19 Re: detectiong positive edge and negative edge of a waveform

Your assumption is o.k.
The input should be a square wave signal for the time being. It will be better if we later on can think of the circuit that can detect pos and neg edges of any type of SIGNALS coming.

I hope it is clear.

I know u are not hr. but u must be knowing about vacancies in your group.

Added after 3 hours 56 minutes:

hi j_andr

Any solution?

Added after 4 minutes:

Hi NICK

Can u please draw the waveform of what you are saying by delaying it by 500 ns with a EXOR gate?

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14 Aug 2008 12:19 Ads

kulkarni_saurabh

Joined: 28 Jul 2005
Posts: 15

16 Aug 2008 23:44 Re: detectiong positive edge and negative edge of a waveform

Hi ASIC_intl,

Posedge and negedge detection is a common requirement in microprocessors. One application could be to detect edge/level triggered events on certain GPIO inputs. I was in a team which was responsible for designing the GPIO module of a processor and we had to implement an event detection functionality based on the following register fields (to be configured through assembly):

BIT_NAME~~~~~VALUE~~~~~FUNCTIONALITY
LEVEL~~~~~~~~ 1 ~~~~~Detect level sensitive event
~~~~~~~~~~~~~0 ~~~~~Detect edge sensitive event

POLARITY~~~~~ 1 ~~~~~Detect posedge/high level signal
~~~~~~~~~~~~~0 ~~~~~Detect negedge/low level signal

In order to implement the edge sensitive functionality we used the following circuit. This circuit has two advantages:

1. It consists of purely digital components (unlike the filters as suggested in an earlier reply).
2. Secondly, this circuit uses only +ve edge triggered FFs. (Dual edge triggering is generally not recommended in ASICs).

The verilog pseudo code for the circuit is:

Code:

DFF FF1 (.clk(clk), .rst(rst), .d(In), .q(Q1) );
DFF FF2 (.clk(clk), .rst(rst), .d(Q1), .q(Q2) );

assign Q_posedge = Q1 & ~Q2;
assign Q_negedge = ~Q1 & Q2;

where "In" is the input signal whose edges you need to detect.
Q_posedge and Q_negedge are signals which are asserted whenever a posedge or negedge occurs on the input.
Mind you, the width of Q_posedge and Q_negedge is 1 clk cycle. You may want to latch it if you want an output signal of higher width. In our case, a width of 1 clk cycle was enough.

Using the above pseudo code you can draw the schematic and work out the waveforms.

In case you are not able to do so, let me know and I'll post the waveforms too.

Regards,
Saurabh