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Analog IC Design & Layout
Analog IC design & Layout questions. Analog ASIC design. Semiconductor Technology issues.
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This topic is locked: you cannot edit posts or make replies. Announcement: ALL E-BOOKS HERE WILL BE DELETED!!! USERS WILL BE WARNED !!!
 0 klug 996 03 Dec 2007 19:00
klug
No new posts output stages
 3 safwatonline 96 09 Jul 2008 16:20
lylnk
No new posts Is there passivation layer on the profile and bottom of chip
 2 wangkes9 72 09 Jul 2008 16:17
lylnk
No new posts Reducing kickback noise
 2 jiesteve 108 09 Jul 2008 16:05
lylnk
No new posts Current vs Width of wire.
 7 tdf 129 09 Jul 2008 16:00
lylnk
No new posts A question about closed-loop stability of LDO?
 8 ken_cn 96 09 Jul 2008 15:27
ashish_chauhan
No new posts Equivalence
 4 mouzid 48 09 Jul 2008 13:19
mouzid
No new posts What is the best layout editor?
[ Goto pageGoto page: 1, 2, 3 ] 		75 lhenfalculan 2877 09 Jul 2008 12:55
sowjikishore
No new posts Channel in NMOS
 3 amitabh262002 84 09 Jul 2008 12:47
Paramjyothi
No new posts help....
 0 jorey 21 09 Jul 2008 9:53
jorey
No new posts Virtuoso hierarchical layout design
 5 tromeros 135 09 Jul 2008 9:14
k_90
No new posts IC sg3524
 0 jorey 24 09 Jul 2008 9:09
jorey
No new posts LC tank VCO start up
 1 jecyhale 48 09 Jul 2008 7:05
Blackuni
No new posts Anybody having this this book
 0 ksooryakrishna1 54 09 Jul 2008 6:18
ksooryakrishna1
No new posts Pipeline adc design
 6 oskar11 315 09 Jul 2008 5:57
wang816449
No new posts Cadence Software Issue: URGENT!!
 1 spminn 66 09 Jul 2008 4:47
Fom
No new posts PMOS with High Turn On Voltage
 2 joyce2002 84 09 Jul 2008 3:25
joyce2002
No new posts Substrate charge pump
 2 js0p 126 09 Jul 2008 0:25
js0p
No new posts Best voltage reference in variable substrate voltage circuit
 0 js0p 30 09 Jul 2008 0:09
js0p
No new posts Transmission Gate
 8 joujou 126 08 Jul 2008 14:56
joujou
No new posts Need Advice on Analog IC Design Training
 2 Mystery2703 39 08 Jul 2008 14:30
k_90
No new posts how to really reduce charge_injection in switch ??
[ Goto pageGoto page: 1, 2 ] 		30 andy2000a 2346 08 Jul 2008 13:14
phoenixsmk
No new posts How to do this in IC5?
[ Goto pageGoto page: 1, 2 ] 		33 sutapanaki 4941 08 Jul 2008 13:09
needforspeed
No new posts voltage contribution in verilog-A
 0 eng_ahmed214 27 08 Jul 2008 12:57
eng_ahmed214
No new posts Waffle v/s Stripped Layout
 8 lastdance 399 08 Jul 2008 10:21
vijay.kumarreddy
No new posts Who is your idole in Analog Design?
[ Goto pageGoto page: 1 ... 6, 7, 8 ] 		213 guamak_menanak 19761 08 Jul 2008 9:26
paley
No new posts A question on start-up circuit in biasing circuit, plz
 0 DZC 51 08 Jul 2008 3:57
DZC
No new posts Dividing junction capacitance of photodiode to smaller piece
 5 Taskuraha 84 07 Jul 2008 11:08
Taskuraha
No new posts How to extract RLC in cadence after layout
 0 ksooryakrishna1 45 07 Jul 2008 7:08
ksooryakrishna1
No new posts matlab & cadence co-simulation
 11 drabos 345 06 Jul 2008 5:27
tiger888
No new posts Could this circuit be used?
 10 Octago 303 06 Jul 2008 2:03
diemilio
No new posts A question of ENOB
 1 hebu 24 05 Jul 2008 16:42
safwatonline
No new posts analog layout vs p & r
 2 sridhar540 87 05 Jul 2008 15:03
leo_o2
No new posts need help for orcad schematic design
 1 afouladi86 36 05 Jul 2008 14:33
Old Nick
No new posts itf and .nxtgrd file for starrcxt
 3 tfabaya 78 05 Jul 2008 1:36
diemilio
No new posts Full Adder using IC7483
 0 Nasty Shinta 42 04 Jul 2008 19:58
Nasty Shinta
No new posts calibre to star-rcxt mapping file
 0 tfabaya 39 04 Jul 2008 18:37
tfabaya
No new posts VCO Gain on PLL
 11 salem_eng1 468 04 Jul 2008 15:08
salem_eng1
No new posts matching
 4 venkat_kode 69 04 Jul 2008 11:24
raduga_in
No new posts how to simulate a LED-circuit
 5 jiangfuchun 105 04 Jul 2008 9:04
Btrend
No new posts The class-d audio designs
 0 chang830 54 04 Jul 2008 8:00
chang830
No new posts RSSI circuit for RF ?
 4 mitgrace 132 04 Jul 2008 6:35
mitgrace
No new posts What's the difference of the SC-70 and SOT-23
 5 chang830 75 04 Jul 2008 4:44
randell_xtian
No new posts heavy or lightly doped?
 4 forkschgrad 126 03 Jul 2008 20:34
forkschgrad
No new posts Drain extended transistors
 0 thirupathik 33 03 Jul 2008 12:53
thirupathik
No new posts Sylabus to Learn Analog Layout
 2 rajesheee235 144 03 Jul 2008 12:29
venkat_kode
No new posts HSPICE is printing all nodes's voltage
 2 mike_bihan 66 03 Jul 2008 10:37
ashish_chauhan
No new posts Urgent : LED driver design
 9 kawaiicat 453 03 Jul 2008 5:47
jiangfuchun
No new posts Spectre VPWLF format
 2 acbalbason 96 03 Jul 2008 3:34
gunturikishore
No new posts polyamide and passivation layer
 1 ashish_chauhan 45 02 Jul 2008 14:31
k_90
No new posts feedback amplifier with capacitive load tends to oscillate?
 4 Octago 69 02 Jul 2008 10:48
ashish_chauhan
No new posts what drawbacks of DC-DC in DCM?
 0 wenda.wu 42 02 Jul 2008 9:42
wenda.wu
No new posts will my circuit oscillate ?
 8 aaronwlee 138 02 Jul 2008 9:24
LvW
No new posts difference between thick gate and thin gate device
 4 sudhasub 150 02 Jul 2008 8:52
quaternion
No new posts Current Steering DAC layout, placement and floor planning
 1 raduga_in 78 02 Jul 2008 8:37
raduga_in
No new posts efuse
 1 surianova 54 02 Jul 2008 5:27
pph_cq
No new posts How to model UTP cat5 cable in gigabit phy simulation?
 0 wwwww12345 24 02 Jul 2008 4:14
wwwww12345
No new posts Offset of the operational amplifier, how can it be reduced
 3 dexter_ex_2ks 114 02 Jul 2008 2:16
linxiang0431
No new posts Why do we use CMFF?
 0 elmolla 30 01 Jul 2008 22:48
elmolla
No new posts measurementof SFDR and SNR of ADC in cadence
 5 prasadel06 126 01 Jul 2008 16:52
hdqkwr
No new posts Low Power Pipeline ADC
 6 sachinagg77 135 01 Jul 2008 16:48
DZC
No new posts How to set the rise time for a step signal in matlab
 1 ksooryakrishna1 30 01 Jul 2008 16:42
DZC
No new posts SC integrator for Sigma-delta modulator
 1 s_babayan 48 01 Jul 2008 15:24
LvW
No new posts pls help check my verilog code for fractional-n pll with sdm
 0 jasonxilion 36 01 Jul 2008 11:14
jasonxilion
No new posts About ARM
 6 anushkannan81 294 01 Jul 2008 7:31
sivasujith
No new posts Multiphase clock design
 0 swagata 45 01 Jul 2008 6:35
swagata
No new posts Linear CMOS V-I converter
 5 swagata 147 30 Jun 2008 19:27
smoked
No new posts how to do the stb analysis for opamp in cadence virtuso
 17 manissri 990 30 Jun 2008 7:27
layes2
No new posts 60dbc image rejection
 0 monping 51 30 Jun 2008 6:21
monping
No new posts Can you provide the ebook
 4 ksooryakrishna1 354 30 Jun 2008 5:24
venkat_kvr
No new posts Is HSIM the same as HSPICE? Or they're similar?
 4 ahmad_abdulghany 111 29 Jun 2008 19:43
Blackuni
No new posts layout dummy transistors
 2 dac5bits 135 29 Jun 2008 19:30
forkschgrad
No new posts Guard rings around pmos
 6 dac5bits 147 29 Jun 2008 12:14
dac5bits
No new posts highest technology?
 2 m_pourfathi 60 29 Jun 2008 11:27
m_pourfathi
No new posts drc and lvs files
 0 mahgoub 63 28 Jun 2008 23:45
mahgoub
No new posts Why does metal2 shold be vertical ?
 9 amitjagtap 165 28 Jun 2008 18:37
Loktik_Vitalij
No new posts I need HSIM user reference/guide/manual/training...
 0 ahmad_abdulghany 39 28 Jun 2008 16:16
ahmad_abdulghany
No new posts PLL design
 4 hemal 153 28 Jun 2008 15:18
ljw108
No new posts Third order PLL
 4 mouzid 258 28 Jun 2008 13:04
trayant
No new posts What is "kick back noise"?
 12 whaler 891 27 Jun 2008 21:17
man_5684
No new posts Pin names in layout
 10 malizevzek 126 27 Jun 2008 16:37
k_90
No new posts Voltage reference Buufer for S.C circuit ?
 0 mitgrace 51 27 Jun 2008 16:13
mitgrace
No new posts left half and right half zero
 10 manissri 189 27 Jun 2008 10:29
LvW
No new posts Lumped or not
 2 AdvaRes 66 27 Jun 2008 9:06
AdvaRes
No new posts How to simulate 100/1000M ethernet line driver spec
 0 wwwww12345 18 27 Jun 2008 8:45
wwwww12345
No new posts how to close LSW window
 1 drabos 96 26 Jun 2008 21:43
Loktik_Vitalij
No new posts Instance length does not fit the given lmax-lmin
 5 cherryic 129 26 Jun 2008 18:48
Blackuni
No new posts Please check my LPF bandwidth and PM...
 3 rficdesigner 87 26 Jun 2008 11:35
LvW
No new posts why the Cgs,Csg,Cgd,Cdg is negative in spectre.How to get ft
 5 wangkes9 132 26 Jun 2008 8:53
edge_tv
No new posts epi and non-epi wafer
 2 surreyian 87 26 Jun 2008 7:22
llbaobao
No new posts differntial pair
 26 sxunxs 639 26 Jun 2008 6:42
analayout
No new posts circuit techniques to reduce history in floating body device
 0 Affline 48 26 Jun 2008 3:59
Affline
No new posts Gm-c 7th order equripple lpf for hard disk read channel
 2 smh87 51 25 Jun 2008 20:14
smh87
No new posts ESD Layout
 2 omsi 132 25 Jun 2008 19:16
layoutmaster
No new posts Adding a library
 2 ErwinM 84 25 Jun 2008 18:29
ErwinM
No new posts Nonvolatile memory
 15 derekqiao 897 25 Jun 2008 17:57
piao
No new posts polar & zero
 0 mickey0908 36 25 Jun 2008 17:28
mickey0908
No new posts Please help I need for the specification of Photoresist
 0 vincent113 57 25 Jun 2008 12:32
vincent113
No new posts Can i use a inductor based on a gyrator for RFIC
 8 Advark 111 25 Jun 2008 11:27
lllxb
No new posts I need TSMC 0.18µm tech files
 5 fasto2008 213 25 Jun 2008 11:00
amitjagtap
No new posts fractional-n pll phase noise
 5 hmsheng 81 25 Jun 2008 10:23
rfsystem
No new posts How to specify the Vcom voltage of sigma delta modulator
 25 BackerShu 276 25 Jun 2008 9:34
joujou
No new posts Switched Capacitor Sample and Hold Circuit: KT/C Noise
 6 sachinagg77 132 25 Jun 2008 9:01
sachinagg77
No new posts problem to integraed the bridge diode
 0 asicpark 36 25 Jun 2008 3:38
asicpark
No new posts DC/DC Used In BC3
 3 cherryic 87 25 Jun 2008 3:28
cherryic
No new posts Question on Sigma-Delta ADC
 3 Rainleo 69 25 Jun 2008 2:59
jiangxb
No new posts Layout software with crosssection view & 3D view feature
 4 kennyg 174 24 Jun 2008 22:32
rfsystem
No new posts rph varies large than rnp
 1 microwaver 33 24 Jun 2008 22:19
rfsystem
No new posts How to calculate the Q factor of the Sampled Data System..?
 24 shady205 246 24 Jun 2008 21:11
RF-OM
No new posts sigma delta DAC design
 2 mitgrace 99 24 Jun 2008 18:13
FvM
No new posts Does anyone meet problem in Cadence: no "VT" data
 3 rficdesigner 42 24 Jun 2008 11:36
AdvaRes
No new posts Vds control of MOSFET
 1 pankajdudulwar 66 24 Jun 2008 5:51
smoked
No new posts Package and bond wire model
 1 Shohdy 63 24 Jun 2008 3:55
fredflinstone
No new posts How to realize a time-varying signal in verilog-a
 0 wwm101 12 23 Jun 2008 15:06
wwm101
No new posts I need the lecture notes of Niknejad in Berkeley EE240
 2 wireless man 192 23 Jun 2008 14:33
wireless man
No new posts A kind of tuning circuit in Gm-C filter
 2 2steps 123 23 Jun 2008 14:11
2steps
No new posts any ic fabrication books or software suggestion.
 1 GaffarEEE 39 23 Jun 2008 12:07
SP24
No new posts capless LDO
 13 jt_rf 661 23 Jun 2008 8:45
yutian
No new posts gate capacitance value of a CMOS transistor ?
 9 Octago 258 23 Jun 2008 5:39
freelancer
No new posts calibre RCX
 2 yhq0413 177 23 Jun 2008 5:19
hgdllt
No new posts Can Cadence netlist schematic in SPICE form? How?
 2 ahmad_abdulghany 117 22 Jun 2008 19:32
Blackuni
No new posts what is your favor drawing software?
[ Goto pageGoto page: 1, 2 ] 		48 field_catcher 3069 21 Jun 2008 22:12
RF-OM
No new posts how to draw a nice intersection view for CMOS transistor ?
 5 coolradar 156 21 Jun 2008 21:45
faiflay
No new posts layout? any freeware to practise layout?
 27 vcsel_driver 1392 21 Jun 2008 21:44
faiflay
No new posts any body help me to know basics of ic layout.
 11 tarakesava 522 21 Jun 2008 21:42
faiflay
No new posts IC layout design software
 8 sbalpande 360 21 Jun 2008 21:40
faiflay
No new posts how to start ic design
 27 grittinjames 1123 21 Jun 2008 21:38
faiflay
No new posts Which is the best tool for layout and simulation at home ?
 24 jeffjose 611 21 Jun 2008 21:31
faiflay
No new posts where can i get layout design software?
 19 turkey 708 21 Jun 2008 21:31
faiflay
No new posts Beginner - Layout techniques
[ Goto pageGoto page: 1, 2, 3 ] 		89 guamak_menanak 14337 21 Jun 2008 21:26
faiflay
No new posts Can I use inductors based in OTAs for RF Applications
 7 Advark 102 21 Jun 2008 21:14
Advark
No new posts gm ploted doesnot equal gm readed
 6 microwaver 195 21 Jun 2008 11:41
LvW
No new posts [ Poll ] Years of experience in IC-level analog design
[ Goto pageGoto page: 1, 2, 3 ] 		78 steer 3932 21 Jun 2008 8:15
edge_tv
No new posts TSMC 0.20u CMOS018 (6M, HV FET, sblock)
[ Goto pageGoto page: 1, 2 ] 		30 isaacnewton 1353 20 Jun 2008 14:48
fasto2008
No new posts PLL bandwidth
 2 AdvaRes 90 20 Jun 2008 13:28
AdvaRes
No new posts LEVEL and VERSION of MOS in SPICE explanation
 1 budzz 72 20 Jun 2008 12:16
hemal
No new posts Do virtuoso layout lecture&lab manuals exist in this for
 4 kennyg 162 20 Jun 2008 9:42
ald356
No new posts someone has designed BJT anolog IC?
 3 wowbigwolf 153 19 Jun 2008 16:26
rfsystem
No new posts How to do the Post layout simulation
 5 cdz<