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Analog IC Design & Layout Analog IC design & Layout questions. Analog ASIC design. Semiconductor Technology issues. Moderator: Super Moderators		Goto page Previous  1, 2, 3 ... 189, 190, 191 ... 205, 206, 207  Next Jump to page:
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Topics		Replies	Author	Views	Last Post
	Announcement: ALL E-BOOKS HERE WILL BE DELETED!!! USERS WILL BE WARNED !!!	0	klug	1326	03 Dec 2007 19:00 klug
	How to simulate the offset of clocked comparator?	4	yyliang	156	19 Jan 2005 15:20 jiangwp
	resistor value in the IC design.	14	triquent	888	19 Jan 2005 6:39 konqueror
	Strange PLL lock problem?	2	cqmyg5	234	19 Jan 2005 6:20 purefen
	Regarding on the Calibre , do you use RVE and Interactive?	4	raymond_luo2003	243	18 Jan 2005 16:38 Analog_starter
	[Help]How to simulate the jitter of the VCO output in HSPICE	4	alanbrooke	225	18 Jan 2005 15:55 Analog_starter
	how to become a mixed-signal IC designer?	24	ynhe	1422	18 Jan 2005 15:42 Analog_starter
	how to cadence IC5 plotter?	1	vosdor	273	18 Jan 2005 13:50 okguy
	How to simulate Quadrature L-C VCO in two states???	0	cqmyg5	165	18 Jan 2005 1:01 cqmyg5
	HIGH VOLTAGE PROCESS	6	twolevel2002	378	17 Jan 2005 12:44 Colbhaidh
	How to simulate inductor in hspice99.4	3	justin	186	17 Jan 2005 10:09 justin
	noise in transient	11	surianova	384	17 Jan 2005 7:37 legend
	Help on Calculator in the Analog Artist window	6	jordan76	318	17 Jan 2005 5:33 jordan76
	how to do this in IC4.46	0	Aforanalog	159	16 Jan 2005 17:49 Aforanalog
	LVS error using DIVA tool	2	chmhero	261	16 Jan 2005 11:40 chmhero
	proteus model for CD4046PLL	0	nebisman	285	16 Jan 2005 3:34 nebisman
	Open Loop and Closed Loop	15	ccw27	993	16 Jan 2005 0:18 Pipeline
	do i have to use long channel length for an LC osc	1	yilmazerc	222	15 Jan 2005 23:53 volkanorhan
	Electronic Packaging	2	Puppet1	204	14 Jan 2005 11:50 layes2
	OTA design	7	pra	411	14 Jan 2005 11:19 layes2
	Cadence simulation	7	ccw27	489	14 Jan 2005 11:16 layes2
	How to simulate/plot THD for a cmos op amp using specter/ADE	4	crazyamd	285	14 Jan 2005 9:29 cristianb
	Doing FFT in cadence analog environment	11	gogomi	597	14 Jan 2005 5:55 djalli
	help design bandgap voltage reference circuit.	6	triquent	600	14 Jan 2005 5:52 triquent
	MOS model for design	9	ccw27	432	13 Jan 2005 18:54 SkyHigh
	how to simulate PSRR of bandgap v?ltages.	1	triquent	249	13 Jan 2005 18:44 wee_liang
	Can I modify an extracted view before I create the netlist?	3	pantic	243	13 Jan 2005 13:04 pantic
	How to determine the bandwidth of OP when designing a DAC	3	jiangwp	288	13 Jan 2005 8:21 jordan76
	which tool can support Place& rout in X86 PC	3	andy2000a	231	13 Jan 2005 4:13 alanbrooke
	how 2 perform noise in transient analysis using H-Spice...	2	pnanda65675	249	13 Jan 2005 3:28 pnanda65675
	which type Cap can be use in Bipolar process ?	1	andy2000a	135	12 Jan 2005 22:57 krashkealoha
	how to set the effective number of digits displayed	1	crazyamd	156	12 Jan 2005 18:21 wee_liang
	how to get gm3 using hspice	1	ET	150	12 Jan 2005 10:40 terryssw
	how to change level?	1	xz781122	219	12 Jan 2005 10:31 alanbrooke
	How to optimize the symmetry of output sin wave of LC-VCO	0	gogomi	153	11 Jan 2005 19:34 gogomi
	LNA	0	jsp	144	11 Jan 2005 5:11 jsp
	Guard rings in Cadence	4	pantic	585	10 Jan 2005 22:11 pantic
	How to simulate 741 CMRR and PSRR ?	12	duron999	750	10 Jan 2005 17:59 duron999
	how to draw log axis in hspice?	1	triquent	168	10 Jan 2005 11:33 twolevel2002
	How can i transfer data from spectre to matlab?	7	swicap	261	09 Jan 2005 19:21 chency
	AMIS 0.5um process - BJT model	6	nEuron	228	08 Jan 2005 14:32 rongli

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