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Analog IC Design & Layout Analog IC design & Layout questions. Analog ASIC design. Semiconductor Technology issues. Moderator: Super Moderators		Goto page Previous  1, 2, 3 ... 114, 115, 116 ... 209, 210, 211  Next Jump to page:
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Topics		Replies	Author	Views	Last Post
	Announcement: ALL E-BOOKS HERE WILL BE DELETED!!! USERS WILL BE WARNED !!!	0	klug	1524	03 Dec 2007 18:00 klug
	assura problems?	2	Youncen	231	18 Oct 2006 15:16 Youncen
	What does system design mean?!?!	5	ahmad_abdulghany	282	18 Oct 2006 13:27 ahmad_abdulghany
	Error while extracting layout	0	kamesh419	96	18 Oct 2006 13:19 kamesh419
	Metal Width for VDD/VSS	13	isaacnewton	576	18 Oct 2006 12:50 mists
	ESD	2	ersachinkalra	258	18 Oct 2006 12:45 ravet
	Question about ESD?	1	colinwang	123	18 Oct 2006 12:36 ravet
	Level shifter 1.0v to 3.3v	7	analog_v	357	18 Oct 2006 12:29 ravet
	The power consumption of VCO in PSS analysis result	0	lijianheng	93	18 Oct 2006 5:51 lijianheng
	what function do the five serial transistors act as ?	9	samuel	270	18 Oct 2006 5:45 shaikhsarfraz
	CMOS max power	3	universa	168	18 Oct 2006 5:12 nickoo
	installation procedure for GPDK90nm cadence PDK	1	rameshabng	189	18 Oct 2006 4:00 holddreams
	Binary weight current DAC mismatch	2	bageduke	144	18 Oct 2006 3:55 nickoo
	Confusion! Keyword:Layout/Virtuoso/LVS	5	sophiefans	234	17 Oct 2006 13:49 YESH_23
	help on layout design	18	ananish	744	17 Oct 2006 9:27 YESH_23
	Problem of grid value of layout (help!!!!!!!!!!!!)	3	Jing	201	17 Oct 2006 9:25 YESH_23
	How many type of IC packet?	4	bicave	168	17 Oct 2006 8:16 megafit
	DC-DC converter	3	fendy	249	17 Oct 2006 8:13 megafit
	Can anyone introduce CMOS drivers of MOSFET and IGBT?	1	xiexi	111	17 Oct 2006 7:30 xiexi
	Any equivalent circuit for 9.8304 MHz crystal resonator?	7	daifei888	354	17 Oct 2006 6:59 daifei888
	Solution manual for Art of analog Layout by hastings	0	rameshabng	138	17 Oct 2006 5:58 rameshabng
	How to setup CCAR(icc) environment in LINUX?	0	erixlion	123	16 Oct 2006 23:22 erixlion
	Anyone using symbolic simulator for circuit analysis?	11	beabroad	552	16 Oct 2006 20:03 roykyn
	Pls give me some ideas about filter design	3	longstar	141	16 Oct 2006 19:48 roykyn
	how simulate SNR,SNDR, and SFDR of ADC with candence.???/	0	zouyufeng	153	16 Oct 2006 18:24 zouyufeng
	Metal Pitch	4	radhikav	192	16 Oct 2006 15:27 ersachinkalra
	spectre rf	0	safwatonline	132	16 Oct 2006 14:42 safwatonline
	SOS, URGENT tsmc 0.18 cmos.data	1	tran	159	16 Oct 2006 10:07 cougar168
	[color=blue]Power rails width calculation[/color]	0	Siril	84	16 Oct 2006 5:29 Siril
	Differences	0	diemilio	87	15 Oct 2006 15:55 diemilio
	SpectreRF	4	safwatonline	216	15 Oct 2006 0:26 khouly
	Integrated universal biquad based on triple-output OTAs	0	benever	60	14 Oct 2006 5:18 benever
	On the Elimination of Reactive Element LoopsDesign of OTA-C	0	benever	69	14 Oct 2006 5:14 benever
	OTA – Based Control System of Active Power Filter	0	benever	99	14 Oct 2006 5:10 benever
	OTA-C Filters with Finite Zeros	0	benever	84	14 Oct 2006 5:07 benever
	Nonlinearity-Induced Distortion of the OTA-C filters	0	benever	93	14 Oct 2006 5:03 benever
	DRC Errors in Cadence	3	gaidin	279	13 Oct 2006 19:22 cad_slvr
	IC LAYOUT	12	prakash13	783	13 Oct 2006 18:06 cad_slvr
	Problem about peanuts	2	yann_sun	219	13 Oct 2006 17:10 yann_sun
	sunstrate coupling with CMOS and Bicmos process	2	chang830	102	13 Oct 2006 16:56 sengyee88
	Porting systems (layout) from one technology to another	0	kamesh419	75	13 Oct 2006 15:59 kamesh419

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