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ASIC Design Methodologies & Tools (Digital) ASIC (Application Specific Integrated Circuit) design methodologies design tool (simulator, synthesis...) related questions Moderator: Super Moderators		Goto page Previous  1, 2, 3 ... 114, 115, 116 ... 276, 277, 278  Next Jump to page:
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Topics		Replies	Author	Views	Last Post
	Announcement: ALL E-BOOKS HERE WILL BE DELETED!!! USERS WILL BE WARNED!!!	0	klug	2397	25 Mar 2007 8:41 klug
	Formality unmatched register	9	newcpu	714	16 Apr 2007 20:10 shashi_dhar123
	RTL Compiler	7	hlasy	493	16 Apr 2007 19:27 gliss
	[Problem] insert scan isnt working -Please help	1	Karthikeya	357	16 Apr 2007 15:03 dft_guy
	some question about scan insert with DFT compiler	4	feel_on_on	528	16 Apr 2007 14:55 drizzle
	X propagation	1	udit	228	16 Apr 2007 10:18 uday_das
	Books and Material for System Verilog! Please Upload!!!	1	xstal	243	16 Apr 2007 8:14 mssajwan
	size of inverter	2	vreddy	219	16 Apr 2007 7:52 eexuke
	free verilog synthesis tool	7	indomitable12345	711	16 Apr 2007 7:42 asicengineer1
	buffering	1	vreddy	240	16 Apr 2007 7:28 p_shinde
	Timing arc	1	kalli	258	16 Apr 2007 6:47 rjainv
	Could anyone provide any documents about .lib	1	newcpu	174	16 Apr 2007 5:37 roy_ece
	How to initialize a union in Systemverilog?	2	boardlanguage	213	15 Apr 2007 16:49 modelsim62c
	happy,today,and i will like this	0	seaman516	75	15 Apr 2007 13:30 seaman516
	ASIC Design beginner	14	deepu_ttc	1197	15 Apr 2007 8:29 kumar_eee
	macromodeling	0	beejan	42	15 Apr 2007 7:38 beejan
	What is low power vlsi design	12	satyakumar	306	15 Apr 2007 7:06 ftfs2002
	DFT book by ABROMOVICCI	0	udit	120	15 Apr 2007 6:31 udit
	pls help me	2	deepu_s_s	93	15 Apr 2007 5:52 deepu_s_s
	SCRIPTS	7	ashgun	315	15 Apr 2007 4:35 shivanand_bhavi
	DC : constraining for area	1	sree205	84	14 Apr 2007 21:08 farhadtehrani
	modeling	0	beejan	33	14 Apr 2007 18:48 beejan
	nand equivalent !!	4	shiv_emf	141	14 Apr 2007 15:40 shiv_emf
	optimization	2	shiv_emf	99	14 Apr 2007 15:02 shiv_emf
	regarding DFT	5	udit	237	14 Apr 2007 11:04 shiv_emf
	perl issue solution required to my problem	2	nipoon123	105	14 Apr 2007 10:14 shiv_emf
	question on DC	4	feel_on_on	210	14 Apr 2007 7:33 sumit_techkgp
	Regarding 16-bit multiplier	2	sishir	150	14 Apr 2007 5:52 kib
	RTL simulation	3	giri_lp	108	14 Apr 2007 5:17 sumit_techkgp
	Reduce power: reduce Freq or reduce volt?	7	davyzhu	438	14 Apr 2007 5:16 sumit_techkgp
	diff b/w RTL and HDL	6	niranr	195	14 Apr 2007 5:12 sumit_techkgp
	Which kind of PLL jitter affect the timing in STA	5	albred	180	14 Apr 2007 5:09 sumit_techkgp
	DC timing violation, what to do first?	4	davyzhu	147	14 Apr 2007 5:05 sumit_techkgp
	what is DFT ?	19	truebs	792	14 Apr 2007 5:04 sumit_techkgp
	simvision and SDF file	5	mathi	270	14 Apr 2007 5:03 sumit_techkgp
	circuit for floating-point	1	omar-malek	69	14 Apr 2007 4:55 sumit_techkgp
	CMOS DIGITAL INTEGRATED BOOKS	10	m_mosazadeh	1839	13 Apr 2007 18:00 jinal patel
	PCI EXPRESS	20	nipoon123	909	13 Apr 2007 17:56 shiv_emf
	How to calculate DIE size?	12	dd2001	1712	13 Apr 2007 17:47 shiv_emf
	vergul flotant	0	omar-malek	45	13 Apr 2007 17:07 omar-malek
	Verilog syntax question	2	alzomor	96	13 Apr 2007 16:34 alzomor

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