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ASIC Design Methodologies & Tools (Digital)


ASIC (Application Specific Integrated Circuit) design methodologies design tool (simulator, synthesis...) related questions

tags: asic design, fpga asic, asic company, asic engineer, asic vlsi, asic vhdl, asic dsp, ,
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This topic is locked: you cannot edit posts or make replies. Announcement: ALL E-BOOKS HERE WILL BE DELETED!!! USERS WILL BE WARNED!!!
 0 klug 3858 25 Mar 2007 8:41
klug
No new posts one question
 1 floatgrass 809 11 Aug 2002 19:11
cuiyujie
No new posts Analog ASIC design
 25 jourval 4634 09 Aug 2002 7:00
gqxfw
No new posts current leakage
 10 SVTONY 1518 31 Jul 2002 22:10
moorhuhn
No new posts Confused by set_output_delay
 3 shockie 3329 31 Jul 2002 3:50
shockie
No new posts Synops. FPGA compiler -> timing constraints problem
 5 vladr 1378 30 Jul 2002 21:07
kinysh
No new posts Ami Cell Library
 3 ramo 1264 28 Jul 2002 9:52
gordon_wan2k
No new posts How to choose the output drive current of I/O pad in ASIC
 6 john5888 1772 26 Jul 2002 15:52
radix
No new posts Hard IP core
 1 jlong_jason 1255 25 Jul 2002 14:04
PigiPigi
No new posts About synopsys Design compiler
 4 shockie 1890 25 Jul 2002 11:15
bopeep
No new posts design cpu
 13 zhoury 3490 25 Jul 2002 5:02
farmerwang
No new posts Who has "Design with VHDL and Synthesis" E-book!!?
 0 always@smart 1156 25 Jul 2002 4:53
always@smart
No new posts Looking for ambit license
 0 shockie 919 25 Jul 2002 2:46
shockie
No new posts who can tell me how i concretly deal with this code ?
 6 floatgrass 1355 25 Jul 2002 2:31
farmerwang
No new posts ------------
 7 hawk 2154 25 Jul 2002 2:18
farmerwang
No new posts Layout cell problem
 0 armer 795 24 Jul 2002 17:11
armer
No new posts ODA Library for WG 2000.5
 1 concat 812 24 Jul 2002 14:46
bigfoot
No new posts register or latch compare with memory?
 6 floatgrass 1345 23 Jul 2002 2:07
floatgrass
No new posts how to i do ?
 4 floatgrass 1211 21 Jul 2002 13:25
shell3
No new posts Is there Any documents on PMM(Power Management module)
 1 andrewcbl 866 21 Jul 2002 9:16
armer
No new posts How to deal with high-fanout nets using DC
 8 magicball 3290 21 Jul 2002 3:52
S0933263236
No new posts Poll: ASIC design tools for Solaris
 13 antipattern 3426 18 Jul 2002 23:53
SVTONY
No new posts Smartmodel question
 2 zhoury 1143 17 Jul 2002 8:02
jeck
No new posts SE/DSM documentation
 2 jk 1072 16 Jul 2002 11:02
philewar
No new posts a question of simulation with Modelsim
 1 brianhe 920 15 Jul 2002 17:28
lipton
No new posts what softwares support OVL (open verifcation library)
 1 shemo 868 15 Jul 2002 17:21
lipton
No new posts Syn(at)psys lic*nse file
 8 cyc 5311 15 Jul 2002 16:20
armer
No new posts VTRAN coversion Tools
 1 ulises 1003 15 Jul 2002 14:36
apollo
No new posts question about Synopsys VCS 6.01
 0 seasonyangd 1090 11 Jul 2002 11:31
seasonyangd
No new posts Power/Ground pad requirement for chip design!
 2 corgan 1279 10 Jul 2002 22:06
moorhuhn
No new posts Cierto VCC form Cadence
 0 ulises 740 10 Jul 2002 11:58
ulises
No new posts new Synthesis tool
 6 andy2000a 2194 09 Jul 2002 5:05
marsgod
No new posts 2000.05 to 2002.05?
 1 DeepIC 1103 06 Jul 2002 15:40
Nobody
No new posts Wirebonder clearance
 9 ASIC 1567 05 Jul 2002 23:46
Nobody
No new posts What is difference between DC and PT?
 4 dd2001 1367 05 Jul 2002 8:23
dd2001
No new posts Looking for Analog, RF, and Mixed-signal Design of Cadence
 0 pjuice 854 03 Jul 2002 15:28
pjuice
No new posts Equalizer of mp3 decoder
 2 cyteng 1138 28 Jun 2002 16:40
MrEd
No new posts A\l\d\e\c vs M\o\d\e\l
 0 z81203 831 25 Jun 2002 5:51
z81203
No new posts ibm testbench fix needed desperately
 1 contador 941 25 Jun 2002 0:33
eman
No new posts Can you UL your ASIC2.2, I solved ver1.2 with Synplify 7.03
 0 dd2001 935 21 Jun 2002 10:34
dd2001
No new posts ask nroig
 0 wred 754 18 Jun 2002 6:48
wred
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