Simple question about HSpice Netlisting

[forps]

I have the netlist for PMOS BS250P.

I built the netlist for NMOS similar to that of PMOS one.

What are values for RG, RL, C1, and C2 (which are bold in NMOS netlist)?

Thanx for any help!

PMOS subcircuit Netlist

.SUBCKT BS250P drain gate source
M1 drain gate1 source source MBS250
RG gate gate1 160
RL drain source 1.2E8
C1 gate1 source 47E-12
C2 gate1 drain 10E-12
D1 drain source DBS250
.MODEL MBS250 PMOS
+VTO=-3.193 RS=2.041 RD=0.697 IS=1E-15 KP=0.277
+CBD=105E-12 PB=1 LAMBDA=1.2E-2
.MODEL DBS250 D IS=2E-13 RS=0.309
.ENDS BS250P

NMOS subcircuit Netlist

.SUBCKT 2N7000 drain gate source
M1 drain gate1 source source 2N7000
RG gate gate1 [Which value??]
RL drain source [Which value??]
C1 gate1 source [Which value??]
C2 gate1 drain [Which value??]
D1 drain source 2N7000
.MODEL 2N7002 NMOS (LEVEL=3 RS=0.0405 NSUB=1.0E15
+DELTA=0.1 KAPPA=0.0506 TPG=1 CGDO=6.1716E-10
+RD=1.22 VTO=2.00 VMAX=1.0E7 ETA=0.0223089
+NFS=6.6E10 TOX=1.0E-7 LD=1.698E-9 UO=862.425
+XJ=6.4666E-7 THETA=1.0E-5 CGSO=9.10E-9 L=2.5E-6
+W=0.5E-2)
.ENDS

 

[keith1200rs]

It represents the parasitic components between the outside pins and the semiconductor die. Most 2N7000 models do not model it in that way - the device model statement has all the characteristics. It is more common for RF devices which are available in different packages so the manufacturer can characterise the device die then add the subcircuit around it for each of the packages it offers.

Is that a "real" 2N7000 or one you are trying to create?

Keith.

Added after 2 minutes:

It looks like the Supertex model. You should simply use it as it is. You don't need to add the extra R and C in the subcircuit.

Keith.

 

[forps]

Another quick question.

When I recall BS250P model as

xm5 gate5 gate5 vdd BS250P m=1

is putting m=1 required?

Added after 4 minutes:

It represents the parasitic components between the outside pins and the semiconductor die. Most 2N7000 models do not model it in that way - the device model statement has all the characteristics. It is more common for RF devices which are available in different packages so the manufacturer can characterise the device die then add the subcircuit around it for each of the packages it offers.

Is that a "real" 2N7000 or one you are trying to create?

Keith.

Added after 2 minutes:

It looks like the Supertex model. You should simply use it as it is. You don't need to add the extra R and C in the subcircuit.

Keith.

Thanks Keith,

so will the following netlist sufficient?

.SUBCKT 2N7000 drain gate source
M1 drain gate1 source source 2N7000
D1 drain source 2N7000
.MODEL 2N7002 NMOS (LEVEL=3 RS=0.0405 NSUB=1.0E15
+DELTA=0.1 KAPPA=0.0506 TPG=1 CGDO=6.1716E-10
+RD=1.22 VTO=2.00 VMAX=1.0E7 ETA=0.0223089
+NFS=6.6E10 TOX=1.0E-7 LD=1.698E-9 UO=862.425
+XJ=6.4666E-7 THETA=1.0E-5 CGSO=9.10E-9 L=2.5E-6
+W=0.5E-2)
.ENDS

 

[keith1200rs]

m=1 is not required - it defaults to 1. It is usually only used for IC design where it is a "multiplier" so you can put 8 transistors in parallel by makeing m=8, for example.

You have a couple of errors in the 2N7000 subcircuit you have made. You have called the diode model 2N7000 and not defined it. Also, your subcircuit is called 2N7000 but the model is 2N7002 which is confusing, if not actually a syntax error.

Something like:

.SUBCKT 2N7002 drain gate source
M1 drain gate1 source source Q2N7002
D1 drain source DIODE1
.MODEL Q2N7002 NMOS (LEVEL=3 RS=0.0405 NSUB=1.0E15
+DELTA=0.1 KAPPA=0.0506 TPG=1 CGDO=6.1716E-10
+RD=1.22 VTO=2.00 VMAX=1.0E7 ETA=0.0223089
+NFS=6.6E10 TOX=1.0E-7 LD=1.698E-9 UO=862.425
+XJ=6.4666E-7 THETA=1.0E-5 CGSO=9.10E-9 L=2.5E-6
+W=0.5E-2)

.MODEL DIODE1 D IS=1.254E-13 N=1.0207 RS=0.222

.ENDS

might be better. The following is the 2N7002 Spice model I have (from Zetex, I think):

.SUBCKT 2N7002 3 4 5
* Nodes D G S
M1 3 2 5 5 MOD1
RG 4 2 343
RL 3 5 6E6
C1 2 5 23.5P
C2 3 2 4.5P
D1 5 3 DIODE1
*
.MODEL MOD1 NMOS VTO=2.474 RS=1.68 RD=0.0 IS=1E-15 KP=0.296
+CBD=53.5P PB=1 LAMBDA=267E-6
.MODEL DIODE1 D IS=1.254E-13 N=1.0207 RS=0.222
.ENDS 2N7002

Keith.

 

[forps]

m=1 is not required - it defaults to 1. It is usually only used for IC design where it is a "multiplier" so you can put 8 transistors in parallel by makeing m=8, for example.

You have a couple of errors in the 2N7000 subcircuit you have made. You have called the diode model 2N7000 and not defined it. Also, your subcircuit is called 2N7000 but the model is 2N7002 which is confusing, if not actually a syntax error.

Something like:

.SUBCKT 2N7002 drain gate source
M1 drain gate1 source source Q2N7002
D1 drain source DIODE1
.MODEL Q2N7002 NMOS (LEVEL=3 RS=0.0405 NSUB=1.0E15
+DELTA=0.1 KAPPA=0.0506 TPG=1 CGDO=6.1716E-10
+RD=1.22 VTO=2.00 VMAX=1.0E7 ETA=0.0223089
+NFS=6.6E10 TOX=1.0E-7 LD=1.698E-9 UO=862.425
+XJ=6.4666E-7 THETA=1.0E-5 CGSO=9.10E-9 L=2.5E-6
+W=0.5E-2)

.MODEL DIODE1 D IS=1.254E-13 N=1.0207 RS=0.222

.ENDS

might be better. The following is the 2N7002 Spice model I have (from Zetex, I think):

.SUBCKT 2N7002 3 4 5
* Nodes D G S
M1 3 2 5 5 MOD1
RG 4 2 343
RL 3 5 6E6
C1 2 5 23.5P
C2 3 2 4.5P
D1 5 3 DIODE1
*
.MODEL MOD1 NMOS VTO=2.474 RS=1.68 RD=0.0 IS=1E-15 KP=0.296
+CBD=53.5P PB=1 LAMBDA=267E-6
.MODEL DIODE1 D IS=1.254E-13 N=1.0207 RS=0.222
.ENDS 2N7002

Keith.

Ahhhhhh!
I was stupid to make mistake copying 2N7002 rather than 2N7000 from supertex library.



So the following is okay, right?


.SUBCKT 2N7000 drain gate source
M1 drain gate1 source source Q2N7000
D1 drain source
.MODEL 2N7000 NMOS (LEVEL=3 RS=0.205 NSUB=1.0E15
+DELTA=0.1 KAPPA=0.0506 TPG=1 CGDO=3.1716E-9
+RD=0.239 VTO=1.000 VMAX=1.0E7 ETA=0.0223089
+NFS=6.6E10 TOX=1.0E-7 LD=1.698E-9 UO=862.425
+XJ=6.4666E-7 THETA=1.0E-5 CGSO=9.09E-9 L=2.5E-6
+W=0.8E-2)
.ENDS

Added after 14 minutes:

So based on my circuit diagram, I produced following netlist.

========================================
========================================

************************************
* Subcircuit Model for PMOS BS250P *
************************************

.SUBCKT BS250P drain gate source
M1 drain gate1 source source MBS250
RG gate gate1 160
RL drain source 1.2E8
C1 gate1 source 47E-12
C2 gate1 drain 10E-12
D1 drain source DBS250
.MODEL MBS250 PMOS
+VTO=-3.193 RS=2.041 RD=0.697 IS=1E-15 KP=0.277
+CBD=105E-12 PB=1 LAMBDA=1.2E-2
.MODEL DBS250 D IS=2E-13 RS=0.309
.ENDS BS250P



*************************************
* Subcircuit Model for NMOS 2N7000 **
*************************************

.SUBCKT 2N7000 drain gate source
M1 drain gate1 source source M2N7000
D1 drain source
.MODEL 2N7000 NMOS (LEVEL=3 RS=0.205 NSUB=1.0E15
+DELTA=0.1 KAPPA=0.0506 TPG=1 CGDO=3.1716E-9
+RD=0.239 VTO=1.000 VMAX=1.0E7 ETA=0.0223089
+NFS=6.6E10 TOX=1.0E-7 LD=1.698E-9 UO=862.425
+XJ=6.4666E-7 THETA=1.0E-5 CGSO=9.09E-9 L=2.5E-6
+W=0.8E-2)
.ENDS


*****************
* Build circuit *
*****************

******************
* Option Section *
******************

.options post=1 brief nmod alt999 accurate acct=1 opts
.options unwrap dccap=1
.param capop=4

***************
* Temperature *
***************

.TEMP=27



*************************************************
* Starting From the top of the circuit diagram *
*************************************************

xM5 gate5 gate5 vdd BS250P
xM6 gate6 gate6 gate5 BS250P
Rref gate6 gnd 'ReferenceResistor'

xm4 drain4 gate5 vdd BS250P m=1
xm3 drain3 gate6 drain4 BS250P m=1

Vd2 drain3 drain2 0
xM2 drain2 vbias_M2 drain1 drain1 2N7000
xM1 drain1 vg source source 2N7000

Rss source gnd 'sourceRes1'
Rb1 vdd vg 'Rb1value'
Rb2 vg gnd 'Rb2value'

.END

=======================================
=======================================


How does this look?
How would I define vdd as 15 V? Just "Vdd 0 vss 15" work?

 

[keith1200rs]

You have missed off the diode model name e.g.

D1 drain source DIODE1

Also, I would suggest you include some sort of model for the diode rather than depending on defaults.

Are you doing this manually - creating a netlist with a text editor rather than a schematic editor?

For Vdd you would have something like:

V1 Vdd gnd DC 1

Depening on your simulator it might want a node zero instead of gnd. If it objects, simply add:

Vgnd gnd 0 DC 0

which will connect your gnd to node zero. You could use a tiny resistor instead.

Keith.

 

[forps]

Thank you Keith,

I am writing this by using text editor.

I guess I will ask my peers from now on.

Thanks a lot for your help!

 

[keith1200rs]

That's a hard way of doing it. For small circuits, download a fully functional, circuit size restricted version of some simulation software with schematic capture such as from here:

https://www.simetrix.co.uk/

It will save you a lot of time (and comes with loads of libraries).

Keith.