cdpstu
Newbie
Nice to meet you all,
I'm exploring potting high voltage, low power PCBs (~5kV) and the possible reduction in distance between components.
After potting a PCB with a good CTI in a low pollution environment, do you have to consider the effects of tracking between components along the boundary between the potting compound and the surface of the PCB, or can it be completely ignored?
It sounds too good to be true - once there is no longer any pollution, the limiting factor is the breakdown of your materials, which can be in the order of kV's/mm making the layout tiny!
I'm guessing there is more to it, it would be great to know what your thoughts are!
I'm exploring potting high voltage, low power PCBs (~5kV) and the possible reduction in distance between components.
After potting a PCB with a good CTI in a low pollution environment, do you have to consider the effects of tracking between components along the boundary between the potting compound and the surface of the PCB, or can it be completely ignored?
It sounds too good to be true - once there is no longer any pollution, the limiting factor is the breakdown of your materials, which can be in the order of kV's/mm making the layout tiny!
I'm guessing there is more to it, it would be great to know what your thoughts are!