[SOLVED] On chip clocks for at speed testing in DFT

[c_ssood]

Please list all the major inputs to a on chip clock generator used for generating clocks for the at speed testing of DFT.

 

[ThisIsNotSam]

Please list all the major inputs to a on chip clock generator used for generating clocks for the at speed testing of DFT.

a base clock, for starters.
assuming this is PLL based, it has to be configured to get the right multipliers.