Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

noise injection during latchup current

Status
Not open for further replies.

bk781

Newbie level 4
Joined
Sep 12, 2020
Messages
6
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
40
Hi

Is the latchup due to majority or minority injection? This doubt came as I was reading about double guardring structures.

-bk
 

Latchup is caused by parasitic npnp structures. It happens for both polarities if the respective junctions are present, probably with different thresholds.
 

Hi @FvM ,
Shouldn't it be primarily from majority carrier injection? For e.g., in the case of powerfets in powerconverter chips, high side powerfet injects holes into the p-substrate which are majority carriers in psub. Likewise, low side powerfet injects electrons into the nwell.
 

Latch-up is triggered by forward biasing bipolar junctions. The latching is provided by minority carriers.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top