miim communication algorithm

[tahtouh]

hello

with media independent interface, there is the MDIO and the MDC.

the MDIO is shared between the PHY and the MAC and is used to share some information and controls.

it is a single wire and i want to kwno if there is a spesific algorithm that allow the phy or the mac to use the MDIO or not.

if not, how it can be shared by PHy and MAC!!!

thank's

 

[FvM]

i want to kwno if there is a specific algorithm

Surely. SMI (Serial Management Interface) uses essentially a master/slave interface. On specific OPcodes, the slave (PHY) will answer at well defined time slots. You'll find the protocol defined in most PHY datahseets and probably in an IEEE 802 document.

 

[tahtouh]

Surely. SMI (Serial Management Interface) uses essentially a master/slave interface. On specific OPcodes, the slave (PHY) will answer at well defined time slots. You'll find the protocol defined in most PHY datahseets and probably in an IEEE 802 document.

this is all that i found in ieee specification

MDIO shall be driven through three-state circuits thatenable either the STA or the PHY to drive the signal.

and i don't knwo if "three-state circuits" refers to only one kind of circuits.

 

[FvM]

this is all that i found in ieee specification

Yes, as you found out, the IEEE specificatipn of the serial interface signals is under 22.2.2. MII signal functional specifications

I think, the chapter contains all necessary information about the operation of the signals, but it's described in a better readable form in PHY datasheets, e.g. from SMSC.

It seems to me like you are quoting the first phrase containing the term "MDIO" without paying attention for the description details that follow, e.g. Table 22–12—Management frame format. Readability is affected by interleaving the description of different MII interfaces in clause 22. I fear you need to read it more than once or refer to other sources.

You didn't tell what's the exact problem you are facing. Usually it's programming the interface at the host processor side (in IEEE terms: Station Management STA). There are ready to use code examples for many processors, e.g. in the Microchip TCP/IP stack. But it's quite easy to write the serial interface code from the scratch, only based on a PHY datasheet.

 

[tahtouh]

can PHY and STA talk at same time, NO

my problem is, when the STA can talk and when the phy can talk

i don't found the answer in the ieee nor the datasheet (i use ksz9021gn )

i other i think that the sta send a request and the phy only answer to it, is that true?

 

[FvM]

I already mentioned that it's a master/slave interface, which involves that the master commands the MDIO data direction during the data phase. During all other phases of the interaction the master (STA) controls MDIO anyway.

 

[tahtouh]

I already mentioned that it's a master/slave interface, which involves that the master commands the MDIO data direction during the data phase. During all other phases of the interaction the master (STA) controls MDIO anyway.

thank u, finely i found it:

Control information is driven by the STA synchronously with respect
to MDC and is sampled synchronously by the PHY.

- - - Updated - - -

I already mentioned that it's a master/slave interface, which involves that the master commands the MDIO data direction during the data phase. During all other phases of the interaction the master (STA) controls MDIO anyway.

22.2.4.5.7 TA (turnaround) IEEE802.3 clause 22.2.4.5.7
The turnaround time is a 2 bit time spacing between the Register Address field and the Data field of a man-
agement frame to avoid contention during a read transaction. For a read transaction, both the STA and the
PHY shall remain in a high-impedance state for the first bit time of the turnaround. The PHY shall drive a
zero bit during the second bit time of the turnaround of a read transaction. During a write transaction, the
STA shall drive a one bit for the first bit time of the turnaround and a zero bit for the second bit time of the

:wink:

thank u again