implementation of barrel shifter

[subramaniam1990]

hi,

I am currently working on a project on implementation of floating point arithmetic...in that i have to implement barrel shifter. .. iam using verilog coding for it..i have coded it...can you just tell me if its right..it will be great if you could help me out..i would like to know if I am moving in right direction.. thank you

this code is for shifting it towards right:

module barrel_shifter(ip , op , shift , clk, load_in , load_out , load_shift);
input ip[31:0];
input shift[4:0];
input clk;
input load_in;
input load_out;
input load_shift;
output op[31:0];


always @(load_in,clk)
begin
if(clk==1)
begin
if(load_in == 1)
begin
buffer_in <= ip;
end
else
begin
buffer_in <= 0;
end
end
end

always @(load_shift,clk)
begin
if(clk==1)
begin
if(load_shift == 1)
begin
buffer_shift <= shift;
end
else
begin
buffer_shift <= 00000;
end
end
end

always @(load_in , load_shift , buffer_in, buffer_shift)
begin
if(buffer_shift[4] == 1)
begin
out_shift4 <= {buffer_in[15:0],buffer_in[31:16]};
end
else
begin
out_shift4 <= buffer_in;
end
end

always @(load_in , load_shift , buffer_shift, out_shift4)
begin
if(buffer_shift[3] ==1'b1)
begin
out_shift3 <= {out_shift4[7:0],out_shift4[31:8]};
end
else
begin
out_shift3 <= out_shift4;
end
end

always @(load_in , load_shift , buffer_shift, out_shift3)
begin
if(buffer_shift[2] ==1)
begin
out_shift2 <= {out_shift3[3:0],out_shift3[31:4]};
end
else
begin
out_shift2 <= out_shift3; //check condition
end
end

always @(load_in , load_shift , buffer_shift, out_shift2)
begin
if(buffer_shift[1] ==1)
begin
out_shift1 = {out_shift2[1:0],out_shift2[31:2]};
end
else
begin
out_shift1 <= out_shift2; //check condition
end
end

always @(load_in , load_shift , buffer_shift, out_shift1)
begin
if(buffer_shift[0] ==1)
begin
out_shift0 <= {out_shift1[0],out_shift1[31:1]};
end
else
begin
out_shift0 <= out_shift1; //check condition
end
end

always @(clk, load_out)
begin
if(clk==1)
begin
if(load_out==1)
begin
op = out_shift1;
end
else
begin
op = 0;
end
end
end

endmodule

is this code fine or should i use case statements directly using diff combinations as case statements..

regards
subramaniam

 

[sandipm14]

Design overview
After putting some thought into the design of a barrel shifter it is clear that some sort of multiplexer circuitry is required to select how the input bits route to the output bits. A naive method of implementing a barrel shifter would be to use N (where N is the number of input bits) parallel N-to-1 multiplexers, one multiplexer that multiplexes all inputs into one of the outputs. This would create an equivalent N*N to N multiplexer, which would use significant hardware resources (multiplexer input grows in O(N2).


A more efficient implementation is possible by creating a hierarchy of multiplexers. For an 8 bit rotate component the multiplexers would be constructed as follows:

the top level multiplexers rotate the data by 4 bits
the second level rotates the data by 2 bits
the third level rotates the data by 1 bit.

Using this approach input data can be shifted an arbitrary number of bits. The number of multiplexers used for an 8 bit rotate component is as follows:

Level one: One 16-to-8 multiplexers
Level two: Two 8-to-4 multiplexers
Level three: Four 4-to-2 multiplexers
Total: 48 multiplexer inputs, 24 multiplexer outputs (16 of which are intermediate signals connected to lower level multiplexers). Using this design the number of multiplexer inputs grows at a rate of O(N log2(N)
The advantage of a hierarchy of multiplexers becomes especially important when the input data is wide. For instance a naive implementation of a 32 bit rotate function would take 32 * 32-to-1 multiplexer inputs (1024-to-32), in contrast a hierarchical design takes 32*log2(32) multiplexer inputs (160-to-80).

8 bit barrel shift (rotate left) diagram


VHDL Source
Note that this design has only been tested with the Xilinx ISE and Modelsim tools.

 

[subramaniam1990]

can anyone help me with this????