[SOLVED] How to estimate Slack

[Sudarsan_EDA]

Dear all,

How to estimate slack & how to reduce it.
I am using Xilinx ISE9.2I for Programing XC3S400-PQ208.

 

[permute]

see xilinx's guides on UCF files, as well as the PAR options in ISE. You should be able to get a .twr report that shows the worst case nets for the constraints you actually described. to improve timing results, you can first try things like global optimization and retiming. Both can improve results, but both will increase time spent in MAP. SmartXplorer is another choice for designs that fail mainly due to congestion or location-related issues. beyond that, you will likely need to change the design. typically by adding register stages either for breaking up combinatorial logic, or to allow for longer routes.